ARM·存储器配置
sdram_elf:
file format elf32-littlearm
Disassembly of section .text:
30000000 <_start>:
30000000: eb000005 bl 3000001c
30000004: eb000010 bl 3000004c
30000008: eb000007 bl 3000002c
3000000c: e59ff090 ldr pc, [pc, #144] ; 300000a4
30000010 :
30000010: e3a0d30d mov sp, #872415232 ; 0x34000000
30000014: eb000035 bl 300000f0
30000018 :
30000018: eafffffe b 30000018
3000001c :
3000001c: e3a01453 mov r1, #1392508928 ; 0x53000000
30000020: e3a02000 mov r2, #0 ; 0x0
30000024: e5812000 str r2, [r1]
30000028: e1a0f00e mov pc, lr
3000002c :
3000002c: e3a01000 mov r1, #0 ; 0x0
30000030: e3a02203 mov r2, #805306368 ; 0x30000000
30000034: e3a03a01 mov r3, #4096 ; 0x1000
30000038: e4914004 ldr r4, [r1], #4
3000003c: e4824004 str r4, [r2], #4
30000040: e1510003 cmp r1, r3
30000044: 1afffffb bne 30000038
30000048: e1a0f00e mov pc, lr
3000004c :
3000004c: e3a01312 mov r1, #1207959552 ; 0x48000000
30000050: e28f2018 add r2, pc, #24 ; 0x18
30000054: e1a00000 nop (mov r0,r0)
30000058: e2813034 add r3, r1, #52 ; 0x34
3000005c: e4924004 ldr r4, [r2], #4
30000060: e4814004 str r4, [r1], #4
30000064: e1510003 cmp r1, r3
30000068: 1afffffb bne 3000005c
3000006c: e1a0f00e mov pc, lr
30000070 :
30000070: 22011110 .word 0x22011110
30000074: 00000700 .word 0x00000700
30000078: 00000700 .word 0x00000700
3000007c: 00000700 .word 0x00000700
30000080: 00000700 .word 0x00000700
30000084: 00000700 .word 0x00000700
30000088: 00000700 .word 0x00000700
3000008c: 00018005 .word 0x00018005
30000090: 00018005 .word 0x00018005
30000094: 008c07a3 .word 0x008c07a3
30000098: 000000b1 .word 0x000000b1
3000009c: 00000030 .word 0x00000030
300000a0: 00000030 .word 0x00000030
300000a4: 30000010 .word 0x30000010
300000a8: e1a00000 .word 0xe1a00000
300000ac: e1a00000 .word 0xe1a00000
300000b0 :
300000b0: e52db004 push {fp} ; (str fp, [sp, #-4]!)
300000b4: e28db000 add fp, sp, #0 ; 0x0
300000b8: e24dd00c sub sp, sp, #12 ; 0xc
300000bc: e50b0008 str r0, [fp, #-8]
300000c0: e51b2008 ldr r2, [fp, #-8]
300000c4: e3520000 cmp r2, #0 ; 0x0
300000c8: 03a03000 moveq r3, #0 ; 0x0
300000cc: 13a03001 movne r3, #1 ; 0x1
300000d0: e20310ff and r1, r3, #255 ; 0xff
300000d4: e2423001 sub r3, r2, #1 ; 0x1
300000d8: e50b3008 str r3, [fp, #-8]
300000dc: e3510000 cmp r1, #0 ; 0x0
300000e0: 1afffff6 bne 300000c0
300000e4: e28bd000 add sp, fp, #0 ; 0x0
300000e8: e8bd0800 pop {fp}
300000ec: e12fff1e bx lr
300000f0 :
300000f0: e92d4800 push {fp, lr}
300000f4: e28db004 add fp, sp, #4 ; 0x4
300000f8: e3a02456 mov r2, #1442840576 ; 0x56000000
300000fc: e2822010 add r2, r2, #16 ; 0x10
30000100: e3a03456 mov r3, #1442840576 ; 0x56000000
30000104: e2833010 add r3, r3, #16 ; 0x10
30000108: e5933000 ldr r3, [r3]
3000010c: e3c33bff bic r3, r3, #261120 ; 0x3fc00
30000110: e5823000 str r3, [r2]
30000114: e3a02456 mov r2, #1442840576 ; 0x56000000
30000118: e2822010 add r2, r2, #16 ; 0x10
3000011c: e3a03456 mov r3, #1442840576 ; 0x56000000
30000120: e2833010 add r3, r3, #16 ; 0x10
30000124: e5933000 ldr r3, [r3]
30000128: e3833b55 orr r3, r3, #87040 ; 0x15400
3000012c: e5823000 str r3, [r2]
30000130: e3a02456 mov r2, #1442840576 ; 0x56000000
30000134: e2822014 add r2, r2, #20 ; 0x14
30000138: e3a03456 mov r3, #1442840576 ; 0x56000000
3000013c: e2833014 add r3, r3, #20 ; 0x14
30000140: e5933000 ldr r3, [r3]
30000144: e3833e1e orr r3, r3, #480 ; 0x1e0
30000148: e5823000 str r3, [r2]
3000014c: e3a02456 mov r2, #1442840576 ; 0x56000000
30000150: e2822014 add r2, r2, #20 ; 0x14
30000154: e3a03456 mov r3, #1442840576 ; 0x56000000
30000158: e2833014 add r3, r3, #20 ; 0x14
3000015c: e5933000 ldr r3, [r3]
30000160: e3c33020 bic r3, r3, #32 ; 0x20
30000164: e5823000 str r3, [r2]
30000168: e3a00064 mov r0, #100 ; 0x64
3000016c: ebffffcf bl 300000b0
30000170: eafffff5 b 3000014c
Disassembly of section .comment:
00000000 <.comment>:
0: 43434700 movtmi r4, #14080 ; 0x3700
4: 5328203a teqpl r8, #58 ; 0x3a
8: 6372756f cmnvs r2, #465567744 ; 0x1bc00000
c: 20797265 rsbscs r7, r9, r5, ror #4
10: 202b2b47 eorcs r2, fp, r7, asr #22
14: 6574694c ldrbvs r6, [r4, #-2380]!
18: 30303220 eorscc r3, r0, r0, lsr #4
1c: 2d337138 ldfcss f7, [r3, #-224]!
20: 20293237 eorcs r3, r9, r7, lsr r2
24: 2e332e34 mrccs 14, 1, r2, cr3, cr4, {1}
28: Address 0x00000028 is out of bounds.
Disassembly of section .ARM.attributes:
00000000 <.ARM.attributes>:
0: 00002541 andeq r2, r0, r1, asr #10
4: 61656100 cmnvs r5, r0, lsl #2
8: 01006962 tsteq r0, r2, ror #18
c: 0000001b andeq r0, r0, fp, lsl r0
10: 00543405 subseq r3, r4, r5, lsl #8
14: 01080206 tsteq r8, r6, lsl #4
18: 01140412 tsteq r4, r2, lsl r4
1c: 03170115 tsteq r7, #1073741829 ; 0x40000005
20: 01190118 tsteq r9, r8, lsl r1
24: Address 0x00000024 is out of bounds.
1）首先我们明确这段程序所处的位置，它位于NAND FLASH 的首地址处，也就是0x0000 0000处。当我们从NAND FLASH启动时，会自动把前面4K的代码复制到SRAM中运行。
这里，我就遇到了一个让我困惑了很久的问题：这条代码的运行地址是0x3000 0000，那么它怎么能在0x0000 0000处运行呢？
答：这就是我们上面补充知识说的位置无关码，
bl
disable_watch_dog
@ 关闭WATCHDOG，否则CPU会不断重启
bl
memsetup
@ 设置存储控制器
bl
copy_steppingstone_to_sdram
@ 复制代码到SDRAM中
这3条指令仍然可以执行，且完成对SDRAM的初始化
2）既然完成了对SDRAM的初始化，也就是说SDRAM现在已经可以帮助内存处理信息了，这时我们的指令是
ldr pc, =on_sdram
@ 跳到SDRAM中继续执行
这就是我们的位置相关码，也就是从SRAM中跳到了SDRAM中继续执行，完成了操作；
【关于实验操作】
友善视频中用的是oflash，但是我们现在有更强大的minitool工具，所以我这里就用minitool进行下载，但是几次调试都失败了，原因如下（图是借用的2451的，不用在意这些细节，自动替换成2440）
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