STM32 FSMC总线深入研究

2. FSMC时序研究

下图为FSMC写命令与数据的时序图，从中根据上图可以分析出FSMC可以实现16M的数据写入。FSMC的信号线翻转非常快，这使得IC或者FPGA时序设计上得非常严谨。FSMC最大实现了72MHz（66.7到100MHz之间，实际为72MHz，HCLK）的翻转速度，这要求外部器件支持那么高的速率。

寄存器配置（寄存器+数据）

连续数据写入（0xBB：写数据开始）,命令后，RS默认拉低（FSMC和标准不一样的地方）

数据建立很快

写数据，然后默认RS拉低

整体的时序可模拟为：

task task_writecmd;

input [15:0] cmd;

begin

mcu_cs = 0;

mcu_rs = 0;

mcu_data = cmd;

#20;

mcu_we = 0;

#20;

mcu_we = 1;

#15;

mcu_rs = 1;

mcu_cs = 1;

#20;

end

endtask

task task_writedata;

input [15:0] data;

begin

mcu_cs = 0;

mcu_rs = 1;

mcu_data = data;

#20;

mcu_we = 0;

#20;

mcu_we = 1;

#15;

mcu_rs = 1;

mcu_cs = 1;

#20;

end

endtask

3. FSMC接口初始化

根据手册，相关参数如下表所示。这里我发现所谓最小值还能设置为最小，但实际速度差不多。FSMC协议时间参数如下所示：

有人跟我说，手册是保守的；有人跟我说，在小就是默认值了。我不太理解。感觉速度每提升，应该在小就是默认了。不过，反正我追求速度的极限。

以下是FSMC-SRAM模式下的初始化代码，分享的同时，希望对你有用。

typedefstruct{ vu16 LCD_REG; vu16 LCD_RAM; } LCD_TypeDef;#defineLCD_WriteCmd(cmd) LCD->LCD_REG = cmd#defineLCD_WriteData(data) LCD->LCD_RAM = data#defineLCD_BASE ((u32)(0x60000000 | 0x0C000000))#defineLCD ((LCD_TypeDef *) LCD_BASE)voidLCD_FSMCConfig(void) { FSMC_NORSRAMInitTypeDef FSMC_NORSRAMInitStructure; FSMC_NORSRAMTimingInitTypeDefp;//标准// p.FSMC_AddressSetupTime = 1;// p.FSMC_AddressHoldTime = 2;// p.FSMC_DataSetupTime = 2;// p.FSMC_BusTurnAroundDuration = 1;// p.FSMC_CLKDivision = 1;// p.FSMC_DataLatency = 2;//超快p.FSMC_AddressSetupTime = 0; p.FSMC_AddressHoldTime = 0; p.FSMC_DataSetupTime = 1; p.FSMC_BusTurnAroundDuration = 0; p.FSMC_CLKDivision = 0; p.FSMC_DataLatency = 0; p.FSMC_AccessMode = FSMC_AccessMode_A; FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM4; FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable; FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_SRAM; FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b; FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable; FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low; FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable; FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState; FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable; FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable; FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable; FSMC_NORSRAMInitStructure.FSMC_AsynchronousWait = FSMC_AsynchronousWait_Disable;//2.0FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable; FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &p; FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &p; FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure); FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM4, ENABLE); }