器件名称: CS18LV10245CI
功能描述: HIgh Speed Super Low Power SRAM
文件大小: 375.99KB 共15页
简 介:High Speed Super Low Power SRAM
128K-Word By 8 Bit
CS18LV10245
DESCRIPTION
The CS18LV10245 is a high performance, high speed and super low power CMOS Static Random Access Memory organized as 131,072 words by 8bits and operates from a wide range of 4.5 to 5.5V supply voltage. Advanced CMOS technology and circuit techniques provide both high speed, super low power features and maximum access time of 55/70ns in 5V operation. Easy memory expansion is provided by an active LOW chip enable (/CE) and active LOW output enable (/OE). The CS18LV10245 has an automatic power down feature, reducing the power consumption significantly when chip is deselected. The CS18LV10245 is available in JEDEC standard 32-pin sTSOP - I (8x13.4 mm), TSOP - I (8x20mm), SOP (450 mil) and PDIP (600 mil) packages.
FEATURES
1. 2. 3. Fully static operation and Tri-state output TTL compatible inputs and outputs Ultra low power consumption : z z 4. 5. 2.0V (min) data retention Low operation voltage : 4.5 ~ 5.5V ; 5mA＠1MHz (Max.) operating current (Vcc = 5.0V) 0.50uA, (Typical value @ Vcc = 5.0V, TA = 25 0C)
Standby Typ. = z z z
Standard pin configuration 32 - SOP 450mil 32 - sTSOP-I - 8X13.4mm 32 - TSOP-I 8X20mm
z
32 - PDIP 600mil
Product Family
Part No. CS18LV10245CC CS18LV10245DC CS18LV10245EC CS18LV10245LC CS18LV10245CI CS18LV10245DI CS18LV10245EI CS18LV10245LI Note: Green package part no, sees order information. Copyright 2004 March Chiplus Semiconductor Corp. All rights reserved. . Rev. 1.2 P1 -4……
