器件名称: CD54HC354F3A
功能描述: 8-Line to 1-Line Data Selector/Multiplexer/Register With 3-State Outputs
文件大小: 168.62KB 共14页
简 介:Semiconductor
CD54HC354, CD74HC354, CD74HCT354
8-Line to 1-Line Data Selector/Multiplexer/Register With 3-State Outputs SCHS277D - November 1997 - Revised May 2003
Features [ /Title (CD74 HC354 , CD74 HCT35 4) /Subject (High Speed CMOS Logic 8-Input Multip lexer/ Regis HC/HCT354 - Transparent Data and Select Latches Buffered Inputs Three-State Complementary Outputs Bus Line Driving Capability Typical Propagation Delay: VCC = 5V, CL = 15pF, TA = 25oC - Data to Output = 18ns Fanout (Over Temperature Range) - Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads - Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads Wide Operating Temperature Range . . . -55oC to 125oC Balanced Propagation Delay and Transition Times Signicant Power Reduction Compared to LSTTL Logic ICs HC Types - 2V to 6V Operation - High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V HCT Types - 4.5V to 5.5V Operation - Direct LSTTL Input Logic Compatibility, VIL= 0.8V (Max), VIH = 2V (Min) - CMOS Input Compatibility, Il ≤ 1A at VOL, VOH
Description
The CD54HC354, CD74HC354, and CD74HCT354 are data selectors/multiplexers that select one of eight sources. In both types, the data select bits S0, S1 and S2 are stored in transparent latches that are enabled by a low latch enable input, LE. In the HC/HCT354 the data enable input, E, controls transparent latches that pass data to the outputs when E is high and latches in new data when E is low. In both types the three-state output……