论坛» 嵌入式开发» FPGA

菜鸟
2007-05-17 02:41 11楼

第7条错了吧,最后好象应该是OFF改成ON.

7.Warning: Clock latency analysis for PLL offsets is supported for the current device family, but is not enabled
措施:将setting中的timing Requirements&Option-->More Timing Setting-->setting-->Enable Clock Latency中的OFF改成ON

菜鸟
2007-05-18 22:11 12楼

多谢多谢阿

菜鸟
2007-05-19 01:38 13楼

收藏 哎 这年头 不灌水都不行

菜鸟
2007-05-29 18:08 14楼
好东西,大家要支持地[em01]
菜鸟
2007-06-01 00:17 15楼
hello
菜鸟
2007-06-02 20:43 16楼
谢谢了
菜鸟
2007-06-05 21:22 17楼
ding a [em01]
菜鸟
2007-06-06 19:57 18楼
芝麻开门
sjw
菜鸟
2007-06-06 21:58 19楼
3Q.....
菜鸟
2007-06-07 17:35 20楼
kankan
共49条 2/5 1 2 3 4 5 跳转至

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