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dsp--28335的cmd文件学习

南盗
专家
2014-09-29 20:07 1楼

今天调试28335发现出现了错误error: can't allocate .ebss, size 00000400 (page 1) in RAMM1 (avail: 00000380），网上找答案都是改Stack Size，改成小于1024，我一看我早就改了，于是静下心来找答案，发现ebss是未初始化的变量存放的空间，于是在程序中将一些以前调试而没有删除的变量删除了，编译就果断ok了，问题是解决了，但是觉得自己关于cmd文件的学习太过草率了，于是，学习一些28335的cmd文件。ps：在去年的笔记中也发现中发现了error: can't allocate .text太大的原因，但是的解决办法是将一些多余的c文件删除就行了，但是还不知道为什么，现在可以解释了。

首先，我们必须要知道一些基本的概念，然后再分析，这里引用书本的一些话。




28335的cmd文件有两个，一个是关于寄存器的，一个是关于程序的。

关于寄存器的cmd文件，包括两部分，一部分是section，这部分是定义的寄存器文件，一部分是map，就是为那些寄存器文件分配地址：

[html] view plain copy 在CODE上查看代码片 派生到我的代码片
  1. MEMORY
  2. {
  3. PAGE 0: /* Program Memory */
  5. PAGE 1: /* Data Memory */
  7. DEV_EMU :origin=0x000880,length=0x000180/* device emulation registers */
  8. FLASH_REGS :origin=0x000A80,length=0x000060/* FLASH registers */
  9. CSM :origin=0x000AE0,length=0x000010/* code security module registers */
  11. ADC_MIRROR :origin=0x000B00,length=0x000010/* ADC Results register mirror */
  13. XINTF :origin=0x000B20,length=0x000020/* external interface registers */
  15. CPU_TIMER0 :origin=0x000C00,length=0x000008/* CPU Timer0 registers */
  16. CPU_TIMER1 :origin=0x000C08,length=0x000008/* CPU Timer0 registers (CPU Timer1 & Timer2 reserved TI use)*/
  17. CPU_TIMER2 :origin=0x000C10,length=0x000008/* CPU Timer0 registers (CPU Timer1 & Timer2 reserved TI use)*/
  19. PIE_CTRL :origin=0x000CE0,length=0x000020/* PIE control registers */
  20. PIE_VECT :origin=0x000D00,length=0x000100/* PIE Vector Table */
  22. DMA :origin=0x001000,length=0x000200/* DMA Rev 0 registers */
  24. MCBSPA :origin=0x005000,length=0x000040/* McBSP-A registers */
  25. MCBSPB :origin=0x005040,length=0x000040/* McBSP-B registers */
  27. ECANA :origin=0x006000,length=0x000040/* eCAN-A control and status registers */
  28. ECANA_LAM :origin=0x006040,length=0x000040/* eCAN-A local acceptance masks */
  29. ECANA_MOTS :origin=0x006080,length=0x000040/* eCAN-A message object time stamps */
  30. ECANA_MOTO :origin=0x0060C0,length=0x000040/* eCAN-A object time-out registers */
  31. ECANA_MBOX :origin=0x006100,length=0x000100/* eCAN-A mailboxes */
  33. ECANB :origin=0x006200,length=0x000040/* eCAN-B control and status registers */
  34. ECANB_LAM :origin=0x006240,length=0x000040/* eCAN-B local acceptance masks */
  35. ECANB_MOTS :origin=0x006280,length=0x000040/* eCAN-B message object time stamps */
  36. ECANB_MOTO :origin=0x0062C0,length=0x000040/* eCAN-B object time-out registers */
  37. ECANB_MBOX :origin=0x006300,length=0x000100/* eCAN-B mailboxes */
  39. EPWM1 :origin=0x006800,length=0x000022/* Enhanced PWM 1 registers */
  40. EPWM2 :origin=0x006840,length=0x000022/* Enhanced PWM 2 registers */
  41. EPWM3 :origin=0x006880,length=0x000022/* Enhanced PWM 3 registers */
  42. EPWM4 :origin=0x0068C0,length=0x000022/* Enhanced PWM 4 registers */
  43. EPWM5 :origin=0x006900,length=0x000022/* Enhanced PWM 5 registers */
  44. EPWM6 :origin=0x006940,length=0x000022/* Enhanced PWM 6 registers */
  46. ECAP1 :origin=0x006A00,length=0x000020/* Enhanced Capture 1 registers */
  47. ECAP2 :origin=0x006A20,length=0x000020/* Enhanced Capture 2 registers */
  48. ECAP3 :origin=0x006A40,length=0x000020/* Enhanced Capture 3 registers */
  49. ECAP4 :origin=0x006A60,length=0x000020/* Enhanced Capture 4 registers */
  50. ECAP5 :origin=0x006A80,length=0x000020/* Enhanced Capture 5 registers */
  51. ECAP6 :origin=0x006AA0,length=0x000020/* Enhanced Capture 6 registers */
  53. EQEP1 :origin=0x006B00,length=0x000040/* Enhanced QEP 1 registers */
  54. EQEP2 :origin=0x006B40,length=0x000040/* Enhanced QEP 2 registers */
  56. GPIOCTRL :origin=0x006F80,length=0x000040/* GPIO control registers */
  57. GPIODAT :origin=0x006FC0,length=0x000020/* GPIO data registers */
  58. GPIOINT :origin=0x006FE0,length=0x000020/* GPIO interrupt/LPM registers */
  60. SYSTEM :origin=0x007010,length=0x000020/* System control registers */
  61. SPIA :origin=0x007040,length=0x000010/* SPI-A registers */
  62. SCIA :origin=0x007050,length=0x000010/* SCI-A registers */
  63. XINTRUPT :origin=0x007070,length=0x000010/* external interrupt registers */
  65. ADC :origin=0x007100,length=0x000020/* ADC registers */
  67. SCIB :origin=0x007750,length=0x000010/* SCI-B registers */
  69. SCIC :origin=0x007770,length=0x000010/* SCI-C registers */
  71. I2CA :origin=0x007900,length=0x000040/* I2C-A registers */
  73. CSM_PWL :origin=0x33FFF8,length=0x000008/* Part of FLASHA. CSM password locations. */
  74. }
  77. SECTIONS
  78. {
  79. PieVectTableFile :>PIE_VECT,PAGE=1
  81. /*** Peripheral Frame 0 Register Structures ***/
  82. DevEmuRegsFile :>DEV_EMU,PAGE=1
  83. FlashRegsFile :>FLASH_REGS,PAGE=1
  84. CsmRegsFile :>CSM,PAGE=1
  85. AdcMirrorFile :>ADC_MIRROR,PAGE=1
  86. XintfRegsFile :>XINTF,PAGE=1
  87. CpuTimer0RegsFile :>CPU_TIMER0,PAGE=1
  88. CpuTimer1RegsFile :>CPU_TIMER1,PAGE=1
  89. CpuTimer2RegsFile :>CPU_TIMER2,PAGE=1
  90. PieCtrlRegsFile :>PIE_CTRL,PAGE=1
  91. DmaRegsFile :>DMA,PAGE=1
  93. /*** Peripheral Frame 3 Register Structures ***/
  94. McbspaRegsFile :>MCBSPA,PAGE=1
  95. McbspbRegsFile :>MCBSPB,PAGE=1
  97. /*** Peripheral Frame 1 Register Structures ***/
  98. ECanaRegsFile :>ECANA,PAGE=1
  99. ECanaLAMRegsFile :>ECANA_LAMPAGE=1
  100. ECanaMboxesFile :>ECANA_MBOXPAGE=1
  101. ECanaMOTSRegsFile :>ECANA_MOTSPAGE=1
  102. ECanaMOTORegsFile :>ECANA_MOTOPAGE=1
  104. ECanbRegsFile :>ECANB,PAGE=1
  105. ECanbLAMRegsFile :>ECANB_LAMPAGE=1
  106. ECanbMboxesFile :>ECANB_MBOXPAGE=1
  107. ECanbMOTSRegsFile :>ECANB_MOTSPAGE=1
  108. ECanbMOTORegsFile :>ECANB_MOTOPAGE=1
  110. EPwm1RegsFile :>EPWM1PAGE=1
  111. EPwm2RegsFile :>EPWM2PAGE=1
  112. EPwm3RegsFile :>EPWM3PAGE=1
  113. EPwm4RegsFile :>EPWM4PAGE=1
  114. EPwm5RegsFile :>EPWM5PAGE=1
  115. EPwm6RegsFile :>EPWM6PAGE=1
  117. ECap1RegsFile :>ECAP1PAGE=1
  118. ECap2RegsFile :>ECAP2PAGE=1
  119. ECap3RegsFile :>ECAP3PAGE=1
  120. ECap4RegsFile :>ECAP4PAGE=1
  121. ECap5RegsFile :>ECAP5PAGE=1
  122. ECap6RegsFile :>ECAP6PAGE=1
  124. EQep1RegsFile :>EQEP1PAGE=1
  125. EQep2RegsFile :>EQEP2PAGE=1
  127. GpioCtrlRegsFile :>GPIOCTRLPAGE=1
  128. GpioDataRegsFile :>GPIODATPAGE=1
  129. GpioIntRegsFile :>GPIOINTPAGE=1
  131. /*** Peripheral Frame 2 Register Structures ***/
  132. SysCtrlRegsFile :>SYSTEM,PAGE=1
  133. SpiaRegsFile :>SPIA,PAGE=1
  134. SciaRegsFile :>SCIA,PAGE=1
  135. XIntruptRegsFile :>XINTRUPT,PAGE=1
  136. AdcRegsFile :>ADC,PAGE=1
  137. ScibRegsFile :>SCIB,PAGE=1
  138. ScicRegsFile :>SCIC,PAGE=1
  139. I2caRegsFile :>I2CA,PAGE=1
  141. /*** Code Security Module Register Structures ***/
  142. CsmPwlFile :>CSM_PWL,PAGE=1

关于寄存器的cmd文件没有什么很难理解的地方，关键是程序的cmd文件，要好好学习一下。

[html] view plain copy 在CODE上查看代码片 派生到我的代码片
  1. MEMORY
  2. {
  3. PAGE 0 :
  4. /* BEGIN is used for the "boot to SARAM" bootloader mode */
  5. /* BOOT_RSVD is used by the boot ROM for stack. */
  6. /* This section is only reserved to keep the BOOT ROM from */
  7. /* corrupting this area during the debug process */
  9. BEGIN :origin=0x000000,length=0x000002/* Boot to M0 will go here */
  10. BOOT_RSVD :origin=0x000002,length=0x00004E/* Part of M0, BOOT rom will use this for stack */
  11. RAMM0 :origin=0x000050,length=0x0003B0
  13. RAML0 :origin=0x008000,length=0x001000
  14. RAML1 :origin=0x009000,length=0x001000
  15. RAML2 :origin=0x00A000,length=0x001000
  16. RAML3 :origin=0x00B000,length=0x001000
  17. ZONE6A :origin=0x100000,length=0x00FC00/* XINTF zone 6 - program space */
  18. CSM_RSVD :origin=0x33FF80,length=0x000076/* Part of FLASHA. Program with all 0x0000 when CSM is in use. */
  19. CSM_PWL :origin=0x33FFF8,length=0x000008/* Part of FLASHA. CSM password locations in FLASHA */
  20. ADC_CAL :origin=0x380080,length=0x000009
  21. RESET :origin=0x3FFFC0,length=0x000002
  22. IQTABLES :origin=0x3FE000,length=0x000b50
  23. IQTABLES2 :origin=0x3FEB50,length=0x00008c
  24. FPUTABLES :origin=0x3FEBDC,length=0x0006A0
  25. BOOTROM :origin=0x3FF27C,length=0x000D44
  28. PAGE 1 :
  29. RAMM1 :origin=0x000400,length=0x000400/* on-chip RAM block M1 */
  30. RAML4 :origin=0x00C000,length=0x001000
  31. RAML5 :origin=0x00D000,length=0x001000
  32. RAML6 :origin=0x00E000,length=0x001000
  33. RAML7 :origin=0x00F000,length=0x001000
  34. ZONE6B :origin=0x10FC00,length=0x000400/* XINTF zone 6 - data space */
  35. }
  38. SECTIONS
  39. {
  40. /* Setup for "boot to SARAM" mode:
  41. The codestart section (found in DSP28_CodeStartBranch.asm)
  42. re-directs execution to the start of user code. */
  43. codestart :>BEGIN,PAGE=0
  44. ramfuncs :>RAML0,PAGE=0
  45. .text :>RAML1,PAGE=0
  46. .cinit :>RAML0,PAGE=0
  47. .pinit :>RAML0,PAGE=0
  48. .switch :>RAML0,PAGE=0
  50. .stack :>RAMM1,PAGE=1
  51. .ebss :>RAML4,PAGE=1
  52. .econst :>RAML5,PAGE=1
  53. .esysmem :>RAMM1,PAGE=1
  55. IQmath :>RAML1,PAGE=0
  56. IQmathTables :>IQTABLES,PAGE=0,TYPE=NOLOAD
  57. IQmathTables2 :>IQTABLES2,PAGE=0,TYPE=NOLOAD
  58. FPUmathTables :>FPUTABLES,PAGE=0,TYPE=NOLOAD
  60. DMARAML4 :>RAML4,PAGE=1
  61. DMARAML5 :>RAML5,PAGE=1
  62. DMARAML6 :>RAML6,PAGE=1
  63. DMARAML7 :>RAML7,PAGE=1
  65. ZONE6DATA :>ZONE6B,PAGE=1
  67. .reset :>RESET,PAGE=0,TYPE=DSECT/* not used */
  68. csm_rsvd :>CSM_RSVDPAGE=0,TYPE=DSECT/* not used for SARAM examples */
  69. csmpasswds :>CSM_PWLPAGE=0,TYPE=DSECT/* not used for SARAM examples */
  71. /* Allocate ADC_cal function (pre-programmed by factory into TI reserved memory) */
  72. .adc_cal :load=ADC_CAL,PAGE=0,TYPE=NOLOAD
  74. }

也是分为两个部分，下面是段，上面是为那些段分配的地址，当然有些段在程序中比较大，但是给他分配的地址又不够，这个时候就报错了，这个时候需要修改程序或者修改cmd文件了，这样，大致的思路就清晰了。PAGE 0代表程序空间， PAGE 1代表数据空间，我们可以将一个大的空间分成两部分，然后将一些段放在这两部分空间里，但这两空间的总和不能超过原有的空间，上述是运行在ram的cmd文件，下面这个cmd文件我报错的cmd文件，对比一下就可以知道原因了。

[html] view plain copy 在CODE上查看代码片 派生到我的代码片
  1. MEMORY
  2. {
  3. PAGE 0: /* Program Memory */
  4. /* Memory (RAM/FLASH/OTP) blocks can be moved to PAGE1 for data allocation */
  6. ZONE0 :origin=0x004000,length=0x001000/* XINTF zone 0 */
  7. RAM_L0L1L2L3:origin=0x008000,length=0x004000/* on-chip RAM */
  8. OTP :origin=0x380400,length=0x000400/* on-chip OTP */
  9. ZONE6 :origin=0x100000,length=0x100000/* XINTF zone 6 */
  10. ZONE7A :origin=0x200000,length=0x00FC00/* XINTF zone 7 - program space */
  11. FLASHH :origin=0x300000,length=0x008000/* on-chip FLASH */
  12. FLASHG :origin=0x308000,length=0x008000/* on-chip FLASH */
  13. FLASHF :origin=0x310000,length=0x008000/* on-chip FLASH */
  14. FLASHE :origin=0x318000,length=0x008000/* on-chip FLASH */
  15. FLASHD :origin=0x320000,length=0x008000/* on-chip FLASH */
  16. FLASHC :origin=0x328000,length=0x008000/* on-chip FLASH */
  17. FLASHA :origin=0x338000,length=0x007F80/* on-chip FLASH */
  18. CSM_RSVD :origin=0x33FF80,length=0x000076/* Part of FLASHA. Program with all 0x0000 when CSM is in use. */
  19. BEGIN_FLASH :origin=0x33FFF6,length=0x000002/* Part of FLASHA. Used for "boot to Flash" bootloader mode. */
  20. CSM_PWL :origin=0x33FFF8,length=0x000008/* Part of FLASHA. CSM password locations in FLASHA */
  21. ADC_CAL :origin=0x380080,length=0x000009/* Part of TI OTP */
  22. IQTABLES :origin=0x3FE000,length=0x000b50/* IQ Math Tables in Boot ROM */
  23. IQTABLES2 :origin=0x3FEB50,length=0x00008c/* IQ Math Tables in Boot ROM */
  24. FPUTABLES :origin=0x3FEBDC,length=0x0006A0/* FPU Tables in Boot ROM */
  25. ROM :origin=0x3FF27C,length=0x000D44/* Boot ROM */
  26. RESET :origin=0x3FFFC0,length=0x000002/* part of boot ROM */
  27. VECTORS :origin=0x3FFFC2,length=0x00003E/* part of boot ROM */
  30. PAGE 1 : /* Data Memory */
  31. /* Memory (RAM/FLASH/OTP) blocks can be moved to PAGE0 for program allocation */
  32. /* Registers remain on PAGE1 */
  34. RAMM0 :origin=0x000000,length=0x000400/* on-chip RAM block M0 */
  35. BOOT_RSVD :origin=0x000400,length=0x000080/* Part of M1, BOOT rom will use this for stack */
  36. RAMM1 :origin=0x000480,length=0x000380/* on-chip RAM block M1 */
  37. RAML4 :origin=0x00C000,length=0x001000/* on-chip RAM block L4 */
  38. RAML5 :origin=0x00D000,length=0x001000/* on-chip RAM block L5 */
  39. RAML6 :origin=0x00E000,length=0x001000/* on-chip RAM block L6 */
  40. RAML7 :origin=0x00F000,length=0x001000/* on-chip RAM block L7 */
  41. ZONE7B :origin=0x20FC00,length=0x000400/* XINTF zone 7 - data space */
  42. }
  44. /**************************************************************/
  45. /* Link all user defined sections */
  46. /**************************************************************/
  47. SECTIONS
  48. {
  50. /*** Code Security Password Locations ***/
  51. csmpasswds :>CSM_PWLPAGE=0
  52. csm_rsvd :>CSM_RSVDPAGE=0
  54. /*** User Defined Sections ***/
  55. codestart :>BEGIN_FLASH,PAGE=0/* Used by file CodeStartBranch.asm */
  56. wddisable :>FLASHA,PAGE=0
  57. copysections :>FLASHA,PAGE=0
  59. /* Allocate IQ math areas: */
  60. IQmath :>FLASHCPAGE=0/* Math Code */
  61. IQmathTables :>IQTABLES,PAGE=0,TYPE=NOLOAD
  62. IQmathTables2 :>IQTABLES2,PAGE=0,TYPE=NOLOAD
  63. FPUmathTables :>FPUTABLES,PAGE=0,TYPE=NOLOAD
  65. /* Allocate DMA-accessible RAM sections: */
  66. DMARAML4 :>RAML4,PAGE=1
  67. DMARAML5 :>RAML5,PAGE=1
  68. DMARAML6 :>RAML6,PAGE=1
  69. DMARAML7 :>RAML7,PAGE=1
  71. /* Allocate 0x400 of XINTF Zone 7 to storing data */
  72. ZONE7DATA :>ZONE7B,PAGE=1
  74. /* Allocate ADC_cal function (pre-programmed by factory into TI reserved memory) */
  75. .adc_cal :load=ADC_CAL,PAGE=0,TYPE=NOLOAD
  77. /* .reset is a standard section used by the compiler. It contains the */
  78. /* the address of the start of _c_int00 for C Code. /*
  79. /* When using the boot ROM this section and the CPU vector */
  80. /* table is not needed. Thus the default type is set here to */
  81. /* DSECT */
  82. .reset :>RESET,PAGE=0,TYPE=DSECT
  83. vectors :>VECTORSPAGE=0,TYPE=DSECT
  85. /*** Uninitialized Sections ***/
  86. .stack :>RAMM0PAGE=1
  87. .ebss :>RAMM1PAGE=1
  88. .esysmem :>RAMM1PAGE=1
  90. /*** Initialized Sections ***/
  91. .cinit :LOAD=FLASHA,PAGE=0/* can be ROM */
  92. RUN=RAM_L0L1L2L3,PAGE=0/* must be CSM secured RAM */
  93. LOAD_START(_cinit_loadstart),
  94. RUN_START(_cinit_runstart),
  95. SIZE(_cinit_size)
  97. .const :LOAD=FLASHA,PAGE=0/* can be ROM */
  98. RUN=RAM_L0L1L2L3,PAGE=0/* must be CSM secured RAM */
  99. LOAD_START(_const_loadstart),
  100. RUN_START(_const_runstart),
  101. SIZE(_const_size)
  103. .econst :LOAD=FLASHA,PAGE=0/* can be ROM */
  104. RUN=RAM_L0L1L2L3,PAGE=0/* must be CSM secured RAM */
  105. LOAD_START(_econst_loadstart),
  106. RUN_START(_econst_runstart),
  107. SIZE(_econst_size)
  109. .pinit :LOAD=FLASHA,PAGE=0/* can be ROM */
  110. RUN=RAM_L0L1L2L3,PAGE=0/* must be CSM secured RAM */
  111. LOAD_START(_pinit_loadstart),
  112. RUN_START(_pinit_runstart),
  113. SIZE(_pinit_size)
  115. .switch :LOAD=FLASHA,PAGE=0/* can be ROM */
  116. RUN=RAM_L0L1L2L3,PAGE=0/* must be CSM secured RAM */
  117. LOAD_START(_switch_loadstart),
  118. RUN_START(_switch_runstart),
  119. SIZE(_switch_size)
  121. .text :LOAD=FLASHA,PAGE=0/* can be ROM */
  122. RUN=RAM_L0L1L2L3,PAGE=0/* must be CSM secured RAM */
  123. LOAD_START(_text_loadstart),
  124. RUN_START(_text_runstart),
  125. SIZE(_text_size)
  126. }

看下M1分成了两个部分，ebss的部分当然就没有0x400了，这也是为什么会报错的原因了，这是学习cmd文件最基本的东西，要真正学好还有很长的一段距离，只能慢慢来了。


上面这张图为编译工程文件时的链接过程，可以解决我们一部分的疑惑。也解释了我第一段中text过大的原因，在工程中有些文件你虽然没有调用，但是他是占text的空间的，这也是我最初删除了一些不用的c文件就编译成功的原因。

paradoxfx
高工
2014-09-29 20:10 2楼
总结的很详细
评论
jobs
院士
2014-09-29 22:06 3楼
我的第一感觉就是，图好大啊~~
评论
jackwang
院士
2014-09-30 09:01 4楼
我把图片缩小了，哈哈
评论
南盗
专家
2014-09-30 09:12 5楼
好的，我下次注意哈。。
评论
scottly1
菜鸟
2014-11-28 19:47 6楼
不错。。。。。
评论
ckcjbxn
菜鸟
2015-12-06 18:11 7楼
很好。。。。。
评论
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