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开发板脚本文件



为了方便后续进程的进行，编写了一个开发板的脚本文件，用于定义开发板的的每个引脚的。这是仿照别人的脚本文件写的，如果有不对的地方，请大神们多多指教。

跟大家分享一下：
http://share.eepw.com.cn/share/download/id/78986

很不错的啊

1.LED闪烁、LED流水灯演示

准备工作也做的差不多了，脚本文件编写完，每次就不用去一个一个引脚的分配了。刚下午调试了LED闪烁、LED流水灯。其实这两个实验没什么多大的区别。先看视频：


LED闪烁




LED流水灯



代码：

module led_flash(
clk,rst_n,
led
);

input clk; //50MHz
input rst_n; //复位信号，低电平有效

output[7: 0] led; //8个LED灯

reg[23: 0] cnt; //计数器，最大可以计到2^24 *20 ns ,大约320ms

always @(posedge clk or negedge rst_n)
if(!rst_n)
cnt <= 24'b0;
else
cnt <= cnt + 1'b1; //循环计数

reg[7: 0] led_r;

always @(posedge clk or negedge rst_n)
if(!rst_n)
led_r <= 8'b11111111;
else if(cnt == 24'hffffff) //每大约320ms led_r进行翻转
led_r <= ~led_r;

assign led = led_r;

endmodule

2、八位数码管静态显示


视频：




module smg_8bit(
clk,rst_n,
sm_cs,sm_db
);

input clk; // 50MHz
input rst_n; // 复位信号，低有效

output[7:0] sm_cs; //数码管片选信号，低有效
output[6:0] sm_db; //7段数码管（不包括小数点）

reg[24:0] cnt; //计数器，最大可以计数到2的25次方*20ns=640ms

always @ (posedge clk or negedge rst_n)
if(!rst_n) cnt <= 25'd0;
else cnt <= cnt+1'b1; //循环计数

reg[3:0] num; //显示数值

always @ (posedge clk or negedge rst_n)
if(!rst_n) num <= 4'd0;
else if(cnt == 24'hffffff) num <= num+1'b1; //每640ms增一

//-------------------------------------------------------------------------------
/* 共阳极 :不带小数点
;0, 1, 2, 3, 4, 5, 6, 7,
db 0xc0,0xf9,0xa4,0xb0,0x99,0x92,7dh,07h
;8, 9, a, b, c, d, e, f ,
db 80h,90h,88h,83h,c6h,a1h,86h,8eh*/
parameter seg0 = 7'hc0,
seg1 = 7'hf9,
seg2 = 7'ha4,
seg3 = 7'hb0,
seg4 = 7'h99,
seg5 = 7'h92,
seg6 = 7'h82,
seg7 = 7'hf8,
seg8 = 7'h80,
seg9 = 7'h90,
sega = 7'h88,
segb = 7'h83,
segc = 7'hc6,
segd = 7'ha1,
sege = 7'h86,
segf = 7'h8e;

reg[6:0] sm_dbr; //7段数码管（不包括小数点）

always @ (num)
case (num) //NUM值显示在两个数码管上
4'h0: sm_dbr <= seg0;

4'h1: sm_dbr <= seg1;
4'h2: sm_dbr <= seg2;
4'h3: sm_dbr <= seg3;
4'h4: sm_dbr <= seg4;
4'h5: sm_dbr <= seg5;
4'h6: sm_dbr <= seg6;
4'h7: sm_dbr <= seg7;
4'h8: sm_dbr <= seg8;
4'h9: sm_dbr <= seg9;
4'ha: sm_dbr <= sega;
4'hb: sm_dbr <= segb;
4'hc: sm_dbr <= segc;
4'hd: sm_dbr <= segd;
4'he: sm_dbr <= sege;
4'hf: sm_dbr <= segf;
default: ;
endcase

assign sm_db = sm_dbr;
assign sm_cs = 8'b0; //数码管常开
endmodule


sof文件：http://share.eepw.com.cn/share/download/id/78999

3、蜂鸣器输出报警音

既然是报警音，当然有点刺耳。 回头弄乐曲的时候声音就悦耳了



源码：

module beep(
clk,rst_n,
beep
);

input clk; //50MHz
input rst_n; //低电平复位信号

output beep; //蜂鸣器

//---------------------------------------------------
reg[15:0] cnt; // 计数器

always @ (posedge clk or negedge rst_n) //异步复位
if(!rst_n) cnt <= 16'd0;
else cnt <= cnt+1'b1; //寄存器cnt 2^16 * 20 ns循环计数

//----------------------------------------------------
reg beep_r; //beep信号值寄存器

always @ (posedge clk or negedge rst_n)
if(!rst_n) beep_r <= 1'b0;
else if(cnt == 4'hffff) beep_r <= ~beep_r; //每2^16 * 20 ns让beep_r值翻转一次

assign beep = beep_r;

endmodule


sof文件：http://share.eepw.com.cn/share/download/id/79006

4、按键实验

啥也不说，先上效果视频。




源码：

//当八个独立按键的某一个被按下后，相应的LED被点亮；
// 再次按下后，LED熄灭，按键控制LED亮灭

module key(
clk,rst_n,
key,led
);

input clk;//主时钟信号，50MHz
input rst_n;//复位信号，低有效
input[7: 0] key;//八个独立按键，低表示按下
output[7: 0] led;//发光二极管，分别由按键控制

//---------------------------------------------------------------------------
reg[7: 0] key_rst;

always @(posedge clk or negedge rst_n)
if (!rst_n) key_rst <= 8'b1111_1111;
else key_rst <= key;

reg[7: 0] key_rst_r;//每个时钟周期的上升沿将low_sw信号锁存到low_sw_r中

always @ ( posedge clk or negedge rst_n )
if (!rst_n) key_rst_r <= 8'b1111_1111;
else key_rst_r <= key_rst;

//当寄存器key_rst由1变为0时，led_an的值变为高，维持一个时钟周期
wire[7: 0] key_an = key_rst_r & ( ~key_rst);

//---------------------------------------------------------------------------
reg[19:0] cnt;//计数寄存器

always @ (posedge clk or negedge rst_n)
if (!rst_n) cnt <= 20'd0;//异步复位
else if(key_an) cnt <=20'd0;
else cnt <= cnt + 1'b1;

reg[7: 0] low_sw;

always @(posedge clk or negedge rst_n)
if (!rst_n) low_sw <= 8'b1111_1111;
else if (cnt == 20'hfffff)//满20ms，将按键值锁存到寄存器low_sw中 cnt == 20'hfffff
low_sw <= key;

//---------------------------------------------------------------------------
reg [7:0] low_sw_r;//每个时钟周期的上升沿将low_sw信号锁存到low_sw_r中

always @ ( posedge clk or negedge rst_n )
if (!rst_n) low_sw_r <= 8'b1111_1111;
else low_sw_r <= low_sw;

//当寄存器low_sw由1变为0时，led_ctrl的值变为高，维持一个时钟周期
wire[7: 0] led_ctrl = low_sw_r[7: 0] & ( ~low_sw[7: 0]);

reg[7: 0] d;

always @ (posedge clk or negedge rst_n)
if (!rst_n)
d <= 8'b1111_1111;
else begin//某个按键值变化时，LED将做亮灭翻转
if ( led_ctrl[0] ) d[0] <= ~d[0];
if ( led_ctrl[1] ) d[1] <= ~d[1];
if ( led_ctrl[2] ) d[2] <= ~d[2];
if ( led_ctrl[3] ) d[3] <= ~d[3];
if ( led_ctrl[4] ) d[4] <= ~d[4];
if ( led_ctrl[5] ) d[5] <= ~d[5];
if ( led_ctrl[6] ) d[6] <= ~d[6];
if ( led_ctrl[7] ) d[7] <= ~d[7];

end

assign led[0] = d[0] ? 1'b1 : 1'b0;//LED翻转输出
assign led[1] = d[1] ? 1'b1 : 1'b0;
assign led[2] = d[2] ? 1'b1 : 1'b0;
assign led[3] = d[3] ? 1'b1 : 1'b0;
assign led[4] = d[4] ? 1'b1 : 1'b0;
assign led[5] = d[5] ? 1'b1 : 1'b0;
assign led[6] = d[6] ? 1'b1 : 1'b0;
assign led[7] = d[7] ? 1'b1 : 1'b0;

endmodule

sof文件：
——回复可见内容——

5、VGA八色显示

视频：



源码：

module veg_8_colour(
clk,rst_n,
hsync,vsync,
vga_r,vga_g,vga_b
);

input clk;//50MHz
input rst_n;//低电平复位
output hsync;//行同步信号
output vsync;//场同步信号
output vga_r;
output vga_g;
output vga_b;

//--------------------------------------------------
reg[10:0] x_cnt;//行坐标
reg[9:0] y_cnt;//列坐标

always @ (posedge clk or negedge rst_n)
if(!rst_n) x_cnt <= 11'd0;
else if(x_cnt == 11'd1039) x_cnt <= 11'd0;
else x_cnt <= x_cnt+1'b1;

always @ (posedge clk or negedge rst_n)
if(!rst_n) y_cnt <= 10'd0;
else if(y_cnt == 10'd665) y_cnt <= 10'd0;
else if(x_cnt == 11'd1039) y_cnt <= y_cnt+1'b1;

//--------------------------------------------------
wire valid;//有效显示区标志

assign valid = (x_cnt >= 11'd187) && (x_cnt < 11'd987)
&& (y_cnt >= 10'd31) && (y_cnt < 10'd631);

wire[9:0] xpos,ypos;//有效显示区坐标

assign xpos = x_cnt-11'd187;
assign ypos = y_cnt-10'd31;

//--------------------------------------------------
reg hsync_r,vsync_r;//同步信号产生

always @ (posedge clk or negedge rst_n)
if(!rst_n) hsync_r <= 1'b1;
else if(x_cnt == 11'd0) hsync_r <= 1'b0;//产生hsync信号
else if(x_cnt == 11'd120) hsync_r <= 1'b1;

always @ (posedge clk or negedge rst_n)
if(!rst_n) vsync_r <= 1'b1;
else if(y_cnt == 10'd0) vsync_r <= 1'b0;//产生vsync信号
else if(y_cnt == 10'd6) vsync_r <= 1'b1;

assign hsync = hsync_r;
assign vsync = vsync_r;

//--------------------------------------------------

//对行进行8等分,显示8个区间
//用红蓝绿及三种颜色的叠加使得显示8种颜色
wire a_dis,b_dis,c_dis,d_dis,e_dis,f_dis,g_dis,h_dis;

assign a_dis = ( (xpos>=0 ) && (xpos<=100) );
assign b_dis = ( (xpos>=100) && (xpos<=200) );
assign c_dis = ( (xpos>=200) && (xpos<=300) );
assign d_dis = ( (xpos>=300) && (xpos<=400) );
assign e_dis = ( (xpos>=400) && (xpos<=500) );
assign f_dis = ( (xpos>=500) && (xpos<=600) );
assign g_dis = ( (xpos>=600) && (xpos<=700) );
assign h_dis = ( (xpos>=700) && (xpos<=800) );

//--------------------------------------------------
//r,g,b控制液晶屏颜色显示
//a显示红色
//b显示绿色
//c显示蓝色
//d区间为红绿叠加 显示黄色
//e区间为红蓝叠加 显示紫色
//f区间为蓝绿叠加 显示天蓝色
//h区间没有任何颜色 显示黑色

assign vga_r = valid ? (a_dis | d_dis | e_dis | g_dis) : 1'b0;
assign vga_g = valid ? (b_dis | d_dis | f_dis | g_dis) : 1'b0;
assign vga_b = valid ? (c_dis | e_dis | f_dis | g_dis) : 1'b0;

endmodule


sof文件：http://share.eepw.com.cn/share/download/id/79019

厉害呀，速度这么快

6、硬件电子琴

视频：





源码：

module key_song(
key,clk,rst_n,
beep,led
);
input clk,rst_n;
input [7:0] key;
output beep;
output [7:0] led;

reg beep_reg;
reg [15:0] count, delay;
reg [7:0] key_reg;

always @ (posedge clk or negedge rst_n)
if(!rst_n)
count <= 16'd0;
else if((count==delay)&(!(delay==16'd65535)))
begin
count <= 16'd0;
beep_reg <= ~beep_reg;
end
else
count <= count + 1'b1;

always @ (key)
begin
key_reg=key;
case(key_reg)
8'b11111110: delay <=16'd47774; //中音1
8'b11111101: delay <=16'd42567; //中音2
8'b11111011: delay <=16'd37919; //中音3
8'b11110111: delay <=16'd35791; //中音4
8'b11101111: delay <=16'd31888; //中音5
8'b11011111: delay <=16'd28409; //中音6
8'b10111111: delay <=16'd25309; //中音7
8'b01111111: delay <=16'd23889; //高音1
default: delay <=16'd65535;
endcase
end
assign beep=beep_reg;
assign led=key_reg;
endmodule


sof文件：key_song.zip