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时钟电路设计

资料介绍
Jitter is extremely important in systems using PLL-based
clock drivers. The effects of jitter range from not having any
effect on system operation to rendering the system completely
non-functional. This application note provides the reader
with a clear understanding of jitter in high-speed systems. It
introduces the reader to various kinds of jitter in high-speed
systems, their causes and their effects, and methods of reducing
jitter. This application note will concentrate on jitter in
PLL-based frequency synthesizers.
标签: (PLLCycle-cyclejitterPLL-BasedSystems
时钟电路设计
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