在Virtex -7和Kintex-7 FPGA中实现高性能DDR3的数据传输速率

基于FPGA的系统经常需要外部存储器接口缓冲区中的数据，超过了FPGA的内部存储器的容量。
White Paper: Virtex-7 and Kintex-7 Families




WP383 (v1.0) March 1, 2011



Achieving High Performance
DDR3 Data Rates
in Virtex-7 and Kintex-7 FPGAs
By: Adrian Cosoroaba




FPGA-based systems frequently require an external
memory interface to buffer data that exceeds the
capacity of the FPGA's internal memory. This
memory interface can often dictate overall system