器件名称:
DAC5681ZIRGCR
功能描述:
16-BIT, 1.0 GSPS 2x-4x INTERPOLATING DIGITAL-TO-ANALOG CONVERTER (DAC)
文件大小:
379.24KB 共8页
简 介:
DAC5681Z www.ti.com SLLS865 – AUGUST 2007 16-BIT, 1.0 GSPS 2x-4x INTERPOLATING DIGITAL-TO-ANALOG CONVERTER (DAC) 1 FEATURES 16-Bit Digital-to-Analog Converter (DAC) 1.0 GSPS Update Rate 16-Bit, 1.0 GSPS Input LVDS Data Bus – 8 Sample Input FIFO – On-Chip Delay Lock Loop High Performance – 73 dBc ACLR WCDMA TM1 at 180 MHz 2x-32x Clock Multiplying PLL/VCO 2x or 4x Interpolation Filters – Stopband Transition 0.4–0.6 Fdata – Filters configurable in either Low-Pass or High-Pass mode–allows selection or higher order image On-Chip 1.2-V Reference Differential Scalable Output: 2 to 20 mA Package: 64-Pin 9 × 9 mm QFN DESCRIPTION The DAC5681Z is a 16-bit 1.0 GSPS digital-to-analog converter (DAC) with wideband LVDS data input, integrated 2x/4x interpolation filters, on-board clock multiplier, and internal voltage reference. The DAC5681Z offers superior linearity and noise performance. The DAC5681Z integrates a wideband LVDS port with on-chip termination, providing full 1.0 GSPS data transfer into the DAC, or half-rate data and 1/4-rate input data can be interpolated by on-board 2x or 4x FIR filters. Each interpolation FIR is configurable in either Low-Pass or High-Pass mode, allowing selection of a higher order output sectral image. An on-chip delay lock loop (DLL) simplifies LVDS interfacing by providing skew control for the LVDS input data clock. The current-steering architecture of the DAC5681Z consists of a segmented array of current sinking switches directing up to 20mA of full……
