器件名称:
D555
功能描述:
112dB 192kHz 24-BIT SCH DAC
文件大小:
35.32KB 共4页
简 介:
ADVANCED LINEAR DEVICES, INC. ALD555 HIGH SPEED CMOS TIMER GENERAL DESCRIPTION The ALD555 timer is a high performance monolithic timing circuit built with advanced silicon gate CMOS technology. It offers the benefits of high input impedance, thereby allowing smaller timing capacitors and longer timing cycle; high speed, with typical cycle time of 500ns; low power dissipation for battery operated environment; reduced supply current spikes, allowing smaller and lower cost decoupling capacitors. It is capable of producing accurate time delays and oscillations in both monostable and astable operation. It operates in the one-shot (monostable) mode or 50% duty cycle free running oscillation mode with a single resistor and one capacitor. The inputs and outputs are fully compatible with CMOS, NMOS or TTL logic. There are three matched internal resistors (approximately 200K each) that set the threshold and trigger levels at two-thirds and one-third respectively of V +. These levels can be adjusted by using the control terminal (pin 5). When the trigger input is below the trigger level, the output is in the high state and sourcing 2mA. When threshold input is above the threshold level at the same time the trigger input is above the trigger level, the internal flip-flop is reset, the output goes to the low state and sinks up to 10mA. The reset input overrides all other inputs and when it is active (reset voltage less than 1V), the output is in the low state. FEATURES Functional equi……
