器件名称: DM74LS162AM
功能描述: Synchronous Presettable BCD Decade Counters
文件大小: 173.17KB 共8页
简 介:54LS160A DM74LS160A 54LS162A DM74LS162A Synchronous Presettable BCD Decade Counters
May 1992
54LS160A DM74LS160A 54LS162A DM74LS162A Synchronous Presettable BCD Decade Counters
General Description
The ’LS160 and ’LS162 are high speed synchronous decade counters operating in the BCD (8421) sequence They are synchronously presettable for application in programmable dividers and have two types of Count Enable inputs plus a Terminal Count output for versatility in forming synchronous multistage counters The ’LS160 has an asynchronous Master Reset input that overrides all other inputs and forces the outputs LOW The ’LS162 has a Synchronous Reset input that overrides counting and parallel loading and allows all outputs to be simultaneously reset on the rising edge of the clock
Features
Y Y Y Y
Synchronous counting and loading High speed synchronous expansion Typical count rate of 35 MHz Fully edge triggered
Connection Diagram
Dual-In-Line Package
TL F 10177 – 1
MR for ’LS160 SR for ’LS162
Order Number 54LS160ADMQB 54LS160AFMQB 54LS160ALMQB 54LS162ADMQB 54LS162AFMQB 54LS162ALMQB DM74LS160AM DM74LS160AN DM74LS162AM or DM74LS162AN See NS Package Number E20A J16A M16A N16E or W16A
Pin Names CEP CET CP MR (’160) SR (’162) P0 – P3 PE Q0 – Q3 TC
Description Count Enable Parallel Input Count Enable Trickle Input Clock Pulse Input (Active Rising Edge) Asynchronous Master Reset Input (Active LOW) Synchronous Reset Input (Active LOW) Parallel Data Inputs Parallel Enable Input (Activ……