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CD54FCT373ATM

器件名称: CD54FCT373ATM
功能描述: FCT Interface Logic Octal Transparent Latch, Three-State
文件大小: 16.87KB 共2页
生产厂商: TI
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简  介: Data sheet acquired from Harris Semiconductor SCHS272 CD54/74FCT373, CD54/74FCT373AT, CD54/74FCT533 FCT Interface Logic Octal Transparent Latch, Three-State Description The CD54/74FCT373, 373AT, and 533 octal transparent latches use a small-geometry BiCMOS technology. The output stage is a combination of bipolar and CMOS transistors that limits the output-HIGH level to two diode drops below VCC. This resultant lowering of output swing (0V to 3.7V) reduces power bus ringing (a source of EMI) and minimizes VCC bounce and ground bounce and their effects during simultaneous output switching. The output configuration also enhances switching speed and is capable of sinking 32mA to 48mA. The CD54/74FCT373, 373AT, and 533 outputs are transparent to the inputs when the Latch Enable (LE) is HIGH. When the Latch Enable (LE) goes LOW, the data is latched. The Output Enable (OE) controls the three-state outputs. When the Output Enable (OE) is HIGH, the outputs are in the highimpedance state. The latch operation is independent of the state of the Output Enable. February 1996 Features CD54/74FCT373, CD54/74FCT373AT - Non-Inverting CD54/74FCT533 - Inverting Buffered inputs Typical Propagation Delay: 3.9ns at VCC = 5V, TA = +25oC, CL = 50pF (FCT373AT) SCR-Latchup-Resistant BiCMOS Process and Circuit Design FCTXXX Types - Speed of Bipolar FAST/AS/S; FCTXXXAT Types - 30% Faster than FAST/AS/S with Signicantly Reduced Power Consumption 48mA to 32mA Output Sink Current (Commercial/ Exte……
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器件名 功能描述 生产厂商
CD54FCT373ATM FCT Interface Logic Octal Transparent Latch, Three-State TI
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