器件名称:
CD54HC174F3A
功能描述:
High-Speed CMOS Logic Hex D-Type Flip-Flop with Reset
文件大小:
277.3KB 共12页
简 介:
CD54HC174, CD74HC174, CD54HCT174, CD74HCT174 Data sheet acquired from Harris Semiconductor SCHS159C August 1997 - Revised October 2003 High-Speed CMOS Logic Hex D-Type Flip-Flop with Reset times is transferred to the Q output on the low to high transition of the CLOCK input. The MR input, when low, sets all outputs to a low state. Each output can drive ten low power Schottky TTL equivalent loads. The ’HCT174 is functional as well as, pin compatible to the ’LS174. Features Buffered Positive Edge Triggered Clock [ /Title (CD74 HC174 , CD74 HCT17 4) /Subject (High Speed CMOS Logic Hex DType FlipFlop Asynchronous Common Reset Fanout (Over Temperature Range) - Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads - Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads Wide Operating Temperature Range . . . -55oC to 125oC Balanced Propagation Delay and Transition Times Signicant Power Reduction Compared to LSTTL Logic ICs HC Types - 2V to 6V Operation - High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V HCT Types - 4.5V to 5.5V Operation - Direct LSTTL Input Logic Compatibility, VIL= 0.8V (Max), VIH = 2V (Min) - CMOS Input Compatibility, Il ≤ 1A at VOL, VOH Ordering Information PART NUMBER CD54HC174F3A CD54HCT174F3A CD74HC174E CD74HC174M CD74HC174MT CD74HC174M96 CD74HCT174E CD74HCT174M TEMP. RANGE (oC) -55 to 125 -55 to 125 -55 to 125 -55 to 125 -55 to 125 -55 to 125 -55 to 125 -55 to 125 -55 to 125 -55 to 125 PACKAGE 16 Ld CERDIP 16 Ld CERDIP ……
