器件名称:
CD54HC273F
功能描述:
High-Speed CMOS Logic Octal D-Type Flip-Flop with Reset
文件大小:
295.01KB 共7页
简 介:
Data sheet acquired from Harris Semiconductor SCHS174B CD54HC273, CD74HC273, CD54HCT273, CD74HCT273 High-Speed CMOS Logic Octal D-Type Flip-Flop with Reset Description The ’HC273 and ’HCT273 high speed octal D-Type flip-flops with a direct clear input are manufactured with silicon-gate CMOS technology. They possess the low power consumption of standard CMOS integrated circuits. Information at the D inputis transferred to the Q outputs on the positive-going edge of the clock pulse. All eight ip-ops are controlled by a common clock (CP) and a common reset (MR). Resetting is accomplished by a low voltage level independent of the clock. All eight Q outputs are reset to a logic 0. February 1998 - Revised May 2003 Features Common Clock and Asynchronous Master Reset [ /Title (CD74 HC273 , CD74 HCT27 3) /Subject (High Speed CMOS Logic Octal DType Flip- Positive Edge Triggering Buffered Inputs Fanout (Over Temperature Range) - Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads - Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads Wide Operating Temperature Range . . . -55oC to 125oC Balanced Propagation Delay and Transition Times Signicant Power Reduction Compared to LSTTL Logic ICs HC Types - 2V to 6V Operation - High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V HCT Types - 4.5V to 5.5V Operation - Direct LSTTL Input Logic Compatibility, VIL= 0.8V (Max), VIH = 2V (Min) - CMOS Input Compatibility, Il ≤ 1A at VOL, VOH Ordering Information PA……
