器件名称:
CD54HC4520F
功能描述:
High-Speed CMOS Logic Dual Synchronous Counters
文件大小:
280.27KB 共13页
简 介:
CD74HC4518, CD54HC4520, CD74HC4520, CD74HCT4520 Data sheet acquired from Harris Semiconductor SCHS216D November 1997 - Revised October 2003 High-Speed CMOS Logic Dual Synchronous Counters having interchangeable CLOCK and ENABLE lines for incrementing on either the positive-going or the negativegoing transition of CLOCK. The counters are cleared by high levels on the MASTER RESET lines. The counter can be cascaded in the ripple mode by connecting Q3 to the ENABLE input of the subsequent counter while the CLOCK input of the latter is held low. Features Positive or Negative Edge Triggering [ /Title (CD74 HC451 8, CD74 HC452 0, CD74 HCT45 20) /Subject Synchronous Internal Carry Propagation Fanout (Over Temperature Range) - Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads - Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads Wide Operating Temperature Range . . . -55oC to 125oC Balanced Propagation Delay and Transition Times Signicant Power Reduction Compared to LSTTL Logic ICs HC Types - 2V to 6V Operation - High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V HCT Types - 4.5V to 5.5V Operation - Direct LSTTL Input Logic Compatibility, VIL= 0.8V (Max), VIH = 2V (Min) - CMOS Input Compatibility, Il ≤ 1A at VOL, VOH Ordering Information PART NUMBER CD54HC4520F3A CD74HC4518E CD74HC4520E CD74HC4520M CD74HC4520MT CD74HC4520M96 CD74HCT4520E CD74HCT4520M CD74HCT4520MT CD74HCT4520M96 TEMP. RANGE (oC) -55 to 125 -55 to 125 -55 to 125 -55 to 125 -……
