器件名称:
CD54HC563F3A
功能描述:
High-Speed CMOS Logic Octal Inverting Transparent Latch, Three-State Outputs
文件大小:
282.94KB 共14页
简 介:
CD54/74HC533, CD54/74HCT533, CD54/74HC563, CD74HCT563 Data sheet acquired from Harris Semiconductor SCHS187C January 1998 - Revised July 2003 High-Speed CMOS Logic Octal Inverting Transparent Latch, Three-State Outputs Description The ’HC533, ’HCT533, ’HC563, and CD74HCT563 are high-speed Octal Transparent Latches manufactured with silicon gate CMOS technology. They possess the low power consumption of standard CMOS integrated circuits, as well as the ability to drive 15 LSTTL devices. The outputs are transparent to the inputs when the latch enable (LE) is high. When the latch enable (LE) goes low the data is latched. The output enable (OE) controls the three-state outputs. When the output enable (OE) is high the outputs are in the high impedance state. The latch operation is independent of the state of the output enable. The ’HC533 and ’HCT533 are identical in function to the ’HC563 and CD74HCT563 but have different pinouts. The ’HC533 and ’HCT533 are similar to the ’HC373 and ’HCT373; the latter are non-inverting types. Features Common Latch-Enable Control [ /Title (CD74H C533, CD74H CT533, CD74H C563, CD74H CT563) /Subject (High Speed Common Three-State Output Enable Control Buffered Inputs Three-State Outputs Bus Line Driving Capacity Typical Propagation Delay = 13ns at VCC = 5V, CL = 15pF, TA = 25oC (Data to Output) Fanout (Over Temperature Range) - Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads - Bus Driver Outputs . . . . . . . . . . . . . 15……
