器件名称:
M74HC174M1R
功能描述:
HEX D-TYPE FLIP FLOP WITH CLEAR
文件大小:
246.88KB 共11页
简 介:
M54HC174 M74HC174 HEX D-TYPE FLIP FLOP WITH CLEAR . . . . . . . . HIGH SPEED fMAX = 71 MHz (TYP.) AT VCC = 5 V LOW POWER DISSIPATION ICC = 4 A (MAX.) AT TA = 25 °C HIGH NOISE IMMUNITY VNIH = VNIL = 28 % VCC (MIN.) OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS SYMMETRICAL OUTPUT IMPEDANCE IOH = IOL = 4 mA (MIN.) BALANCED PROPAGATION DELAYS tPLH = tPHL WIDE OPERATING VOLTAGE RANGE VCC (OPR) = 2 V TO 6 V PIN AND FUNCTION COMPATIBLE WITH 54/74LS174 B1R (Plastic Package) F1R (Ceramic Package) M1R (Micro Package) C1R (Chip Carrier) ORDER CODES : M54HC174F1R M74HC174M1R M74HC174B1R M74HC174C1R DESCRIPTION The M54/74HC174 is a high speed CMOS HEX DTYPE FLIP-FLOP WITH CLEAR fabricated in silicon gate C2MOS technology. It has the same high speed performance of LSTTL combined with true CMOS low power consumption. Information signals applied to D inputs are transfered to the Q output on the positive going edge of the clock pulse. When the CLEAR input is held low, the Q outputs are held low independently of the other inputs. All inputs are equipped with protection circuits against static discharge and transient excess voltage. PIN CONNECTIONS (top view) INPUT AND OUTPUT EQUIVALENT CIRCUIT NC = No Internal Connection October 1992 1/11 M54/M74HC174 TRUTH TABLE INPUTS CLEAR L H H H X: Don’t Care OUTPUTS CK X Q L L H Qn D X L H X FUNCTION CLEAR NO CHANGE PIN DESCRIPTION PIN No 1 2, 5, 7, 10, 12, 15 3, 4, 6, 11, 13, 14 9 8 16 SYMBOL CLEAR Q0 to Q5 D0 to D5 CLOCK GND V CC NAME AND ……
