器件名称:
M74HC377RM13TR
功能描述:
OCTAL D TYPE FLIP FLOP
文件大小:
362.09KB 共11页
简 介:
M74HC377 OCTAL D TYPE FLIP FLOP s s s s s s s HIGH SPEED : fMAX = 66 MHz (TYP.) at VCC = 6V LOW POWER DISSIPATION: ICC =4A(MAX.) at TA=25°C HIGH NOISE IMMUNITY: VNIH = V NIL = 28 % VCC (MIN.) SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 4mA (MIN) BALANCED PROPAGATION DELAYS: tPLH tPHL WIDE OPERATING VOLTAGE RANGE: VCC (OPR) = 2V to 6V PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 377 DIP SOP TSSOP ORDER CODES PACKAGE DIP SOP TSSOP TUBE M74HC377B1R M74HC377M1R T&R M74HC377RM13TR M74HC377TTR DESCRIPTION The M74HC377 is an high speed CMOS OCTAL D TYPE FLIP FLOP fabricated with silicon gate C2MOS technology. Information at the D inputs meeting the setup time requirements is transferred to the Q outputs on the positive going edge of the clock pulse if the enable input G is low. Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive going pulse. When the clock input is at either the high or low level, the D input signal has no effect at the output. All inputs are equipped with protection circuits against static discharge and transient excess voltage. PIN CONNECTION AND IEC LOGIC SYMBOLS July 2001 1/11 M74HC377 INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN DESCRIPTION PIN No 1 2, 5, 6, 9, 12, 15, 16, 19 3, 4, 7, 8, 13, 14, 17, 18 11 10 20 SYMBOL G 1Q to 8Q 1D to 8D CLOCK GND Vcc NAME AND FUNCTION Data Enable Input (Active LOW) Flip Flop Outputs Data Inputs Clock Input (LOW to HIGH, Edge Triggered) Ground (0V)……
