器件名称:
M74HCT174RM13TR
功能描述:
HEX D-TYPE FLIP FLOP WITH CLEAR
文件大小:
243.58KB 共10页
简 介:
M74HCT174 HEX D-TYPE FLIP FLOP WITH CLEAR s s s s s s HIGH SPEED : fMAX = 56MHz (TYP.) at VCC = 4.5V LOW POWER DISSIPATION: ICC =4A(MAX.) at TA=25°C COMPATIBLE WITH TTL OUTPUTS : VIH = 2V (MIN.) VIL = 0.8V (MAX) SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 4mA (MIN) BALANCED PROPAGATION DELAYS: tPLH tPHL PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 174 DIP SOP TSSOP ORDER CODES PACKAGE DIP SOP TSSOP TUBE M74HCT174B1R M74HCT174M1R T&R M74HCT174RM13TR M74HCT174TTR DESCRIPTION The M74HCT174 is an high speed CMOS HEX D-TYPE FLIP FLOP WITH CLEAR fabricated with silicon gate C2MOS technology. Information signals applied to D inputs are transferred to the Q output on the positive going edge of the CLOCK (CK) pulse. When the CLEAR (CLR) input is held low, the Q outputs are held low independently of the other inputs. All inputs are equipped with protection circuits against static discharge and transient excess voltage. PIN CONNECTION AND IEC LOGIC SYMBOLS August 2001 1/10 M74HCT174 INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN DESCRIPTION PIN No 1 2, 5, 7, 10, 12, 15 3, 4, 6, 11, 13, 14 9 8 16 SYMBOL CLEAR Q0 to Q5 D0 to D5 CLOCK GND Vcc NAME AND FUNCTION Asynchronous Master Reset (Active Low) Flip-Flop Outputs Data Inputs Clock Input (LOW to HIGH, edge triggered) Ground (0V) Positive Supply Voltage TRUTH TABLE INPUTS CLEAR L H H H X : Don’t Care OUTPUTS FUNCTION CK X Q L L H Qn NO CHANGE CLEAR D X L H X LOGIC DIAGRAM This logic diagram has not to be used to estimate pro……
