器件名称:
M74HCT273
功能描述:
OCTAL D TYPE FLIP FLOP WITH CLEAR
文件大小:
267.99KB 共10页
简 介:
M74HCT273 OCTAL D TYPE FLIP FLOP WITH CLEAR s HIGH SPEED : fMAX = 80 MHz (TYP.) at VCC = 4.5V LOW POWER DISSIPATION: ICC =4A(MAX.) at TA=25°C COMPATIBLE WITH TTL OUTPUTS : VIH = 2V (MIN.) VIL = 0.8V (MAX) SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 4mA (MIN) BALANCED PROPAGATION DELAYS: tPLH tPHL PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 273 ORDER CODES PACKAGE DIP SOP TSSOP TUBE M74HCT273B1R M74HCT273M1R T&R M74HCT273RM13TR M74HCT273TTR DIP SOP TSSOP s s s s s DESCRIPTION The M74HCT273 is an high speed CMOS OCTAL D TYPE FLIP FLOP WITH CLEAR fabricated with silicon gate C2MOS technology. Information signals applied to D inputs are transferred to the Q outputs on the positive-going edge of the clock pulse. When the CLEAR input is held low, the Q output are in the low logic level independent of the other inputs. All inputs are equipped with protection circuits against static discharge and transient excess voltage. PIN CONNECTION AND IEC LOGIC SYMBOLS August 2001 1/10 M74HCT273 INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN DESCRIPTION PIN No 1 2, 5, 6, 9, 12, 15, 16, 19 3, 4, 7, 8, 13, 14, 17, 18 11 10 20 SYMBOL CLEAR Q0 to Q7 D0 to D7 CLOCK GND Vcc NAME AND FUNCTION Master Reset Input (Active LOW) Flip Flop Outputs Data Inputs Clock Input (LOW to HIGH, Edge Triggered) Ground (0V) Positive Supply Voltage TRUTH TABLE INPUTS CLEAR L H H H X : Don’t Care OUTPUTS FUNCTION D X L H X Q L L H Qn NO CHANGE CLEAR CLOCK X LOGIC DIAGRAM This logic diagram has not be used to es……
