器件名称:
MC100EL29DW
功能描述:
5V ECL Dual Differential Data and Clock D FlipFlop With Set and Reset
文件大小:
116.5KB 共6页
简 介:
MC100EL29 5V ECL Dual Differential Data and Clock D FlipFlop With Set and Reset Description The MC100EL29 is a dual masterslave flip flop. The device features fully differential Data and Clock inputs as well as outputs. Data enters the master latch when the clock is LOW and transfers to the slave upon a positive transition on the clock input. The VBB pin, an internally generated voltage supply, is available to this device only. For single-ended input conditions, the unused differential input is connected to VBB as a switching reference voltage. VBB may also rebias AC coupled inputs. When used, decouple VBB and VCC via a 0.01 mF capacitor and limit current sourcing or sinking to 0.5 mA. When not used, VBB should be left open. The differential inputs have special circuitry which ensures device stability under open input conditions. When both differential inputs are left open the D input will pull down to VEE and the D input will bias around VCC/2. The outputs will go to a defined state, however the state will be random based on how the flip flop powers up. Both flip flops feature asynchronous, overriding Set and Reset inputs. Note that the Set and Reset inputs cannot both be HIGH simultaneously. The 100 Series Contains Temperature Compensation Features http://onsemi.com SO20 WB SUFFIX CASE 751D MARKING DIAGRAM* 20 100EL29 AWLYYWWG 1100 MHz FlipFlop Toggle Frequency 580 ps Propagation Delays Q Output will Default LOW with Inputs Open or at VEE PECL Mode Operat……
