器件名称:
MC74ACT273DTR2
功能描述:
Octal D FlipFlop
文件大小:
111.91KB 共8页
简 介:
MC74AC273, MC74ACT273 Octal D FlipFlop The MC74AC273/74ACT273 has eight edge-triggered Dtype flipflops with individual D inputs and Q outputs. The common buffered Clock (CP) and Master Reset (MR) inputs load and reset (clear) all flipflops simultaneously. The register is fully edge-triggered. The state of each D input, one setup time before the LOWtoHIGH clock transition, is transferred to the corresponding flipflop’s Q output. All outputs will be forced LOW independently of Clock or Data inputs by a LOW voltage level on the MR input. The device is useful for applications where the true output only is required and the Clock and Master Reset are common to all storage elements. Features http://onsemi.com 20 1 PDIP20 SUFFIX N CASE 738 Ideal Buffer for MOS Microprocessor or Memory Eight Edge-Triggered D FlipFlops Buffered Common Clock Buffered, Asynchronous Master Reset See MC74AC377 for Clock Enable Version See MC74AC373 for Transparent Latch Version See MC74AC374 for 3-State Version Outputs Source/Sink 24 mA ′ACT273 Has TTL Compatible Inputs PbFree Packages are Available* VCC 20 Q7 19 D7 18 D6 17 Q6 16 Q5 15 D5 14 D4 13 Q4 12 CP 11 20 SOIC20WB SUFFIX DW CASE 751D 1 TSSOP20 SUFFIX DT CASE 948E 1 SOEIAJ20 SUFFIX M CASE 967 1 20 20 PIN ASSIGNMENT PIN D0D7 1 MR 2 Q0 3 D0 4 D1 5 6 7 D2 8 D3 9 Q3 10 GND MR CP Q0Q7 Q1 Q2 (Top View) FUNCTION Data Inputs Master Reset Clock Pulse Input Data Outputs Pinout: 20Lead Packages Conductors MODE SELECT-FUNCTION TABLE Operat……
