器件名称:
MC74HC175ADR2G
功能描述:
Quad D FlipFlop with Common Clock and Reset HighPerformance SiliconGate CMOS
文件大小:
121.01KB 共10页
简 介:
MC74HC175A Quad D FlipFlop with Common Clock and Reset HighPerformance SiliconGate CMOS The MC74HC175A is identical in pinout to the LS175. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. This device consists of four D flipflops with common Reset and Clock inputs, and separate D inputs. Reset (activelow) is asynchronous and occurs when a low level is applied to the Reset input. Information at a D input is transferred to the corresponding Q output on the next positive going edge of the Clock input. Features http://onsemi.com MARKING DIAGRAMS 16 16 1 PDIP16 N SUFFIX CASE 648 1 16 16 1 SOIC16 D SUFFIX CASE 751B 1 16 16 1 TSSOP16 DT SUFFIX CASE 948F 1 16 16 1 SOEIAJ16 F SUFFIX CASE 966 1 74HC175A ALYWG HC 175A ALYWG G HC175AG AWLYWW MC74HC175AN AWLYYWW Output Drive Capability: 10 LSTTL Loads Outputs Directly Interface to CMOS, NMOS, and TTL Operating Voltage Range: 2.0 to 6.0 V Low Input Current: 1 mA High Noise Immunity Characteristic of CMOS Devices In Compliance with the Requirements Defined by JEDEC Standard No. 7A Chip Complexity 166 FETs or 41.5 Equivalent Gates PbFree Packages are Available* A = Assembly Location L, WL = Wafer Lot Y, YY = Year W, WW = Work Week G = PbFree Package G = PbFree Package (Note: Microdot may be in either location) ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 2 of this data sheet. *For additional……
