器件名称:
MC74LVX74DR2
功能描述:
Dual DType FlipFlop with Set and Clear
文件大小:
112.73KB 共7页
简 介:
MC74LVX74 Dual DType FlipFlop with Set and Clear With 5.0 VTolerant Inputs The MC74LVX74 is an advanced high speed CMOS Dtype flipflop. The inputs tolerate voltages up to 7.0 V, allowing the interface of 5.0 V systems to 3.0 V systems. The signal level applied to the D input is transferred to O output during the positive going transition of the Clock pulse. Clear (CD) and Set (SD) are independent of the Clock (CP) and are accomplished by setting the appropriate input Low. Features http://onsemi.com MARKING DIAGRAMS 14 SOIC14 D SUFFIX CASE 751A 1 14 TSSOP14 DT SUFFIX CASE 948G 1 14 SOEIAJ14 M SUFFIX CASE 965 1 LVX74 ALYWG LVX 74 ALYW G G LVX74G AWLYWW 1 High Speed: fmax = 145 MHz (Typ) at VCC = 3.3 V Low Power Dissipation: ICC = 2 mA (Max) at TA = 25°C Power Down Protection Provided on Inputs Balanced Propagation Delays Low Noise: VOLP = 0.5 V (Max) Pin and Function Compatible with Other Standard Logic Families Latchup Performance Exceeds 300 mA ESD Performance: Human Body Model > 2000 V; Machine Model > 200 V PbFree Packages are Available* 1 1 VCC 14 CD2 13 D2 12 CP2 11 SD2 10 O2 9 O2 8 A = Assembly Location WL, L = Wafer Lot Y = Year W, WW = Work Week G or G = PbFree Package (Note: Microdot may be in either location) PIN NAMES 1 CD1 2 D1 3 CP1 4 SD1 5 O1 6 O1 7 GND Pins CP1, CP2 D1, D2 CD1, CD2 SD1, SD2 On, On Function Clock Pulse Inputs Data Inputs Direct Clear Inputs Direct Set Inputs Outputs Figure 1. 14Lead Pinout (Top View) ORDERING INFORMATION ……
