器件名称:
EM488M1644LBB-75F
功能描述:
128Mb (2M
文件大小:
667.67KB 共19页
简 介:
eorex Features Preliminary EM488M1644LBB 128Mb (2M×4Bank×16) Synchronous DRAM Description The EM488M1644LBB is Synchronous Dynamic Random Access Memory (SDRAM) organized as 2Meg words x 4 banks by 16 bits. All inputs and outputs are synchronized with the positive edge of the clock. The 128Mb SDRAM uses synchronized pipelined architecture to achieve high speed data transfer rates and is designed to operate at 1.8V low power memory system. It also provides auto refresh with power saving / down mode. All inputs and outputs voltage levels are compatible with LVCMOS. Available packages: TFBGA-54B(8mmx8mm) Fully Synchronous to Positive Clock Edge Single 1.8V ±0.1V Power Supply LVCMOS Compatible with Multiplexed Address Programmable Burst Length –1/2/4/8/ full Page Programmable CAS Latency (C/L) - 2 or 3 Data Mask (DQM) for Read / Write Masking Programmable Wrap Sequence – Sequential (B/L = 1/2/4/8/full Page) – Interleave (B/L = 1/2/4/8) Burst Read with Single-bit Write Operation Deep Power Down Mode. Auto Refresh and Self Refresh Special Function Support. – PASR (Partial Array Self Refresh) – Auto TCSR (Temperature Compensated Self Refresh) Programmable Driver Strength Control – Full Strength or 1/2, 1/4 of Full Strength 4,096 Refresh Cycles / 64ms (15.625us) Ordering Information Part No EM488M1644LBB-75F EM488M1644LBB-75FE Organization 8M X 16 8M X 16 Max. Freq 133MHz @CL3 133MHz @CL3 Package TFBGA -54B TFBGA -54B Grade Commercial Pb Free Extend temp. Free ……
