器件名称:
EM488M1644VBA-75F
功能描述:
128Mb (2M
文件大小:
637.84KB 共17页
简 介:
eorex Features Fully Synchronous to Positive Clock Edge Single 2.8V ~ 3.6V Power Supply LVTTL Compatible with Multiplexed Address Programmable Burst Length (B/L) - 1, 2, 4, 8 or Full Page Programmable CAS Latency (C/L) - 2 or 3 Data Mask (DQM) for Read / Write Masking Programmable Wrap Sequence – Sequential (B/L = 1/2/4/8/full Page) – Interleave (B/L = 1/2/4/8) Burst Read with Single-bit Write Operation All Inputs are Sampled at the Rising Edge of the System Clock Auto Refresh and Self Refresh 4,096 Refresh Cycles / 64ms (15.625us) EM488M1644VBA 128Mb (2M×4Bank×16) Synchronous DRAM Description The EM488M1644VBA is Synchronous Dynamic Random Access Memory (SDRAM) organized as 2Meg words x 4 banks by 16 bits. All inputs and outputs are synchronized with the positive edge of the clock. The 128Mb SDRAM uses synchronized pipelined architecture to achieve high speed data transfer rates and is designed to operate at 3.3V low power memory system. It also provides auto refresh with power saving / down mode. All inputs and outputs voltage levels are compatible with LVTTL. Available packages:TFBGA-54B(8mmx8mm). Ordering Information Part No EM488M1644VBA-75F Organization 8M X 16 Max. Freq 133MHz @CL3 Package TFBGA -54B Grade Commercial Pb Free * EOREX reserves the right to change products or specification without notice. Jul. 2006 1/17 www.eorex.com eorex Pin Assignment:TFBGA 54B 1 VSS DQ14 DQ12 DQ10 DQ8 UDQM NC A8 VSS DQ15 DQ13 DQ11 DQ9 NC CLK A11 A7 A5 2 3 VSSQ V……
