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EM6156K800WSA-45IF

器件名称: EM6156K800WSA-45IF
功能描述: 256Kx16 LP SRAM
文件大小: 239.59KB 共12页
生产厂商: EOREX
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简  介: 256Kx16 LP SRAM EM6156K600V Series GENERAL DESCRIPTION The EM6156K600V is a 4,194,304-bit low power CMOS static random access memory organized as 262,144 words by 16 bits. It is fabricated using very high performance, high reliability CMOS technology. Its standby current is stable within the range of operating temperature. The EM6156K600V is well designed for low power application, and particularly well suited for battery back-up nonvolatile memory application. The EM6156K600V operates from a single power supply of 2.7V ~ 3.6V and all inputs and outputs are fully TTL compatible FEATURES z z Fast access time: 45/55/70ns Low power consumption: Operating current: 40/30/20mA (TYP.) Standby current: -L/-LL version 20/2A (TYP.) Single 2.7V ~ 3.6V power supply All inputs and outputs TTL compatible Fully static operation z z z z Tri-state output Data byte control : LB# (DQ0 ~ DQ7) UB# (DQ8 ~ DQ15) Data retention voltage: 1.5V (MIN.) Package: 44-pin 400 mil TSOP-II 48-ball 6mm x 8mm TFBGA z z z FUNCTIONAL BLOCK DIAGRAM Vcc Vss A0-A17 DECODER 256Kx16 MEMORY ARRAY DQ0-DQ7 Lower Byte DQ8-DQ15 Upper Byte CE# WE# OE# LB# UB# I/O DATA CURCUIT COLUMN I/O CONTROL CIRCUIT PIN DESCRIPTION SYMBOL A0 - A17 DQ0 – DQ17 CE# WE# OE# LB# UB# Vcc Vss DESCRIPTION Address Inputs Data Inputs/Outputs Chip Enable Input Write Enable Input Output Enable Input Lower Byte Control Upper Byte Control Power Supply Ground 1 DCC-SR-041003-A 256Kx16 LP SRAM EM6156K600V Series PIN CONFIGURATION TSOP-II ……
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EM6156K800WSA-45IF 256Kx16 LP SRAM EOREX
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