器件名称:
M74HC155M1R
功能描述:
M74HC155_01
文件大小:
283.62KB 共9页
简 介:
M74HC155 DUAL 2 TO 4 LINE DECODER 3 TO 8 LINE DECODER s s s s s s s HIGH SPEED: tPD = 13ns (TYP.) at VCC = 6V LOW POWER DISSIPATION: ICC = 4A(MAX.) at TA=25°C HIGH NOISE IMMUNITY: VNIH = V NIL = 28 % VCC (MIN.) SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 4mA (MIN) BALANCED PROPAGATION DELAYS: tPLH tPHL WIDE OPERATING VOLTAGE RANGE: VCC (OPR) = 2V to 6V PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 155 DIP SOP TSSOP ORDER CODES PACKAGE DIP SOP TSSOP TUBE M74HC155B1R M74HC155M1R T&R M74HC155RM13TR M74HC155TTR DESCRIPTION The M74HC155 is an high speed CMOS QUAD 2-INPUT NAND GATE fabricated with silicon gate C2MOS technology. It features dual 1 to 4 line demultiplexers with individual strobe inputs (1G and 2G), individual data inputs (1C and 2C) and common binary address inputs (A and B). When both decoders are enabled by the strobes, the inverted output of 1C data and non-inverted output of 2C data will be brought to the select output pins of each sections. A 1 to 8 line demultiplexer can also easily built up by providing a data signal to both 1C and 2C inputs; the output order from the msb is 1Y3, 1Y2, 1Y1, 1Y0, 2Y3, 2Y2, 2Y1, 2Y0. This device can be used as a 2 to 4 line decoder or a 3 to 8 line decoder when 1C is held high and 2C is held low. All inputs are equipped with protection circuits against static discharge and transient excess voltage. PIN CONNECTION AND IEC LOGIC SYMBOLS July 2001 1/9 M74HC155 INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN DESCRIPTION PIN N……