器件名称:
M74HC192
功能描述:
SYNCHRONOUS UP/DOWN DECADE COUNTER
文件大小:
560.65KB 共14页
简 介:
M74HC192 SYNCHRONOUS UP/DOWN DECADE COUNTER s s s s s s s HIGH SPEED : fMAX = 55 MHz (TYP.) at VCC = 6V LOW POWER DISSIPATION: ICC =4A(MAX.) at TA=25°C HIGH NOISE IMMUNITY: VNIH = V NIL = 28 % VCC (MIN.) SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 4mA (MIN) BALANCED PROPAGATION DELAYS: tPLH tPHL WIDE OPERATING VOLTAGE RANGE: VCC (OPR) = 2V to 6V PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 192 DIP SOP TSSOP ORDER CODES PACKAGE DIP SOP TSSOP TUBE M74HC192B1R M74HC192M1R T&R M74HC192RM13TR M74HC192TTR DESCRIPTION The M74HC192 is an high speed CMOS SYNCRONOUS UP/DOWN DECADE COUNTERS fabricated with silicon gate C2MOS technology. The counter has two separate clock inputs, an UP COUNT input and a DOWN COUNT input. All outputs of the flip-flop are simultaneously triggered on the low to high transition of either clock while the other input is held high. The direction of counting is determined by which input is clocked. This counter may be preset by entering the desired data on the DATA A, DATA B, DATA C, and DATA D input. When the LOAD input is taken low the data is loaded independently of either clock input. This feature allows the counters to be used as divide-by-n counters by modifying the count length with the preset inputs. In addition PIN CONNECTION AND IEC LOGIC SYMBOLS the counter can also be cleared. This is accomplished by inputting a high on the CLEAR input. All 4 internal stages are set to low independently of either COUNT input. Both a BORROW and CARRY outpu……
