器件名称:
M74HC294
功能描述:
PROGRAMMABLE DIVIDER/TIMER
文件大小:
422.22KB 共11页
简 介:
M74HC294 PROGRAMMABLE DIVIDER/TIMER s s s s s s s HIGH SPEED : fMAX = 75 MHz (TYP.) at VCC = 6V LOW POWER DISSIPATION: ICC =4A(MAX.) at TA=25°C HIGH NOISE IMMUNITY: VNIH = V NIL = 28 % VCC (MIN.) SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 4mA (MIN) BALANCED PROPAGATION DELAYS: tPLH tPHL WIDE OPERATING VOLTAGE RANGE: VCC (OPR) = 2V to 6V PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 294 DIP SOP TSSOP ORDER CODES PACKAGE DIP SOP TSSOP TUBE M74HC294B1R M74HC294M1R T&R M74HC294RM13TR M74HC294TTR DESCRIPTION The M74HC294 is an high speed CMOS PROGRAMMABLE DIVIDER/TIMER fabricated with silicon gate C2MOS technology. This device is a programmable frequency divider and has two clock inputs, either one may be used for clock gating. (see the function table). The M74HC294 can divide from 22 to 215. This device feature an active-low clear input to initialize the state of all flip-flops. To facilitate incoming inspection, test points (TP) are provided. All inputs are equipped with protection circuits against static discharge and transient excess voltage. This device has Q output with "Totem Pole" configuration and test point TP with "Open Drain" output configuration. PIN CONNECTION AND IEC LOGIC SYMBOLS August 2001 1/11 M74HC294 INPUT AND OUTPUT EQUIVALENT CIRCUIT (TOTEM POLE OUTPUT) INPUT AND OUTPUT EQUIVALENT CIRCUIT (OPEN DRAIN OUTPUT) PIN DESCRIPTION PIN No 4, 5 1, 2, 14, 15 3 11 7 8 16 SYMBOL CLK1, CLK2 A to E TP CLR Q GND Vcc NAME AND FUNCTION Input Clock Program I……