器件名称:
M74HC4017TTR
功能描述:
DECADE COUNTER/DIVIDER
文件大小:
375.59KB 共12页
简 介:
M74HC4017 DECADE COUNTER/DIVIDER s s s s s s s HIGH SPEED : tPD = 21 ns (TYP.) at VCC = 6V LOW POWER DISSIPATION: ICC =4A(MAX.) at TA=25°C HIGH NOISE IMMUNITY: VNIH = V NIL = 28 % VCC (MIN.) SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 4mA (MIN) BALANCED PROPAGATION DELAYS: tPLH tPHL WIDE OPERATING VOLTAGE RANGE: VCC (OPR) = 2V to 6V PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 4017 DIP SOP TSSOP ORDER CODES PACKAGE DIP SOP TSSOP TUBE M74HC4017B1R M74HC4017M1R T&R M74HC4017RM13TR M74HC4017TTR DESCRIPTION The M74HC4017 is an high speed CMOS DECADE COUNTER/DIVIDER fabricated with silicon gate C2MOS technology. The M74HC4017 is a 5-stage Johnson counter with 10 decoded outputs. Each of the decoded outputs is normally low and sequentially goes high on the low to high transition of the clock input. Each output stays high for one clock period of the 10 clock period cycle. The CARRY output goes low to high after OUTPUT 10 goes low, and can be used in conjunction with the CLOCK ENABLE (CKEN)to cascade several stages. The CLOCK ENABLE input disables counting when in the high state. A CLEAR (CLR) input is also provided which when taken high sets all the decoded outputs low. All inputs are equipped with protection circuits against static discharge and transient excess voltage. PIN CONNECTION AND IEC LOGIC SYMBOLS August 2001 1/12 M74HC4017 INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN DESCRIPTION PIN No 3, 2, 4, 7, 10, 1, 5, 6, 9, 11 12 13 14 15 8 16 SYMBOL Q0 to Q9 COUT CKEN ……
