器件名称:
M74HC4020B1R
功能描述:
14 STAGE BINARY COUNTER
文件大小:
364.84KB 共11页
简 介:
M74HC4020 14 STAGE BINARY COUNTER s s s s s s s HIGH SPEED : fMAX = 70 MHz (TYP.) at VCC = 6V LOW POWER DISSIPATION: ICC =4A(MAX.) at TA=25°C HIGH NOISE IMMUNITY: VNIH = V NIL = 28 % VCC (MIN.) SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 4mA (MIN) BALANCED PROPAGATION DELAYS: tPLH tPHL WIDE OPERATING VOLTAGE RANGE: VCC (OPR) = 2V to 6V PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 4020 DIP SOP TSSOP ORDER CODES PACKAGE DIP SOP TSSOP TUBE M74HC4020B1R M74HC4020M1R T&R M74HC4020RM13TR M74HC4020TTR DESCRIPTION The M74HC4020 is an high speed CMOS 14 STAGE BINARY COUNTER fabricated with silicon gate C2MOS technology. A clear input is used to reset the counter to the all low level state. A high level on CLEAR accomplishes the reset function. A negative transition on the CLOCK input increments the counter by one. For M74HC4020 twelve kind of divided output are provided; 1st and 4th stage to 14th stage. The maximum division available at last stage is 1/16384 x fIN at clock. All inputs are equipped with protection circuits against static discharge and transient excess voltage. PIN CONNECTION AND IEC LOGIC SYMBOLS July 2001 1/11 M74HC4020 INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN DESCRIPTION PIN No 9, 7, 6, 5, 3, 2, 4, 13, 12, 14, 15, 1 10 11 8 16 SYMBOL Q1, Q4 to Q14 CLOCK CLEAR GND Vcc NAME AND FUNCTION Parallel Outputs Clock Input (LOW to HIGH, Edge Triggered) Reset Inputs Ground (0V) Positive Supply Voltage TRUTH TABLE CLOCK X CLEAR H L L OUTPUT STATE ALL OUTPUTS = "……
