器件名称:
MC74VHC541DW
功能描述:
Octal Bus Buffer
文件大小:
164.63KB 共6页
简 介:
MOTOROLA SEMICONDUCTOR TECHNICAL DATA Octal Bus Buffer The MC74VHC541 is an advanced high speed CMOS octal bus buffer fabricated with silicon gate CMOS technology. It achieves high speed operation similar to equivalent Bipolar Schottky TTL while maintaining CMOS low power dissipation. The MC74VHC541 is a noninverting type. When either OE1 or OE2 are high, the terminal outputs are in the high impedance state. The internal circuit is composed of three stages, including a buffer output which provides high noise immunity and stable output. The inputs tolerate voltages up to 7V, allowing the interface of 5V systems to 3V systems. High Speed: tPD = 3.7ns (Typ) at VCC = 5V Low Power Dissipation: ICC = 4A (Max) at TA = 25°C High Noise Immunity: VNIH = VNIL = 28% VCC Power Down Protection Provided on Inputs Balanced Propagation Delays Designed for 2V to 5.5V Operating Range Low Noise: VOLP = 1.2V (Max) Pin and Function Compatible with Other Standard Logic Families Latchup Performance Exceeds 300mA ESD Performance: HBM > 2000V; Machine Model > 200V Chip Complexity: 134 FETs or 33.5 Equivalent Gates MC74VHC541 DW SUFFIX 20–LEAD SOIC WIDE PACKAGE CASE 751D–04 DT SUFFIX 20–LEAD TSSOP PACKAGE CASE 948E–02 M SUFFIX 20–LEAD SOIC EIAJ PACKAGE CASE 967–01 ORDERING INFORMATION MC74VHCXXXDW SOIC WIDE MC74VHCXXXDT TSSOP MC74VHCXXXM SOIC EIAJ LOGIC DIAGRAM A1 A2 A3 A4 A5 A6 A7 A8 OUTPUT ENABLES OE1 OE2 2 3 4 5 6 7 8 9 1 19 18 17 16 15 14 13 12 11 Y1 Y2 Y3 Y4 Y5 Y6 Y7 Y8 PIN ASSI……
