器件名称:
SM320C6202BGLS167
功能描述:
FIXED-POINT DIGITAL SIGNAL PROCESSORS
文件大小:
1176.12KB 共83页
简 介:
TMS320C6211, TMS320C6211B FIXED-POINT DIGITAL SIGNAL PROCESSORS SPRS073K AUGUST 1998 REVISED MARCH 2004 D Excellent Price/Performance Digital Signal D D D Processors (DSPs): TMS320C62x (TMS320C6211 and TMS320C6211B) Eight 32-Bit Instructions/Cycle C6211, C6211B, C6711, and C6711B are Pin-Compatible 150-, 167-MHz Clock Rates 6.7-, 6-ns Instruction Cycle Time 1200, 1333 MIPS Extended Temperature Device (C6211B) VelociTI Advanced Very Long Instruction Word (VLIW) C62x DSP Core (C6211/11B) Eight Highly Independent Functional Units: Six ALUs (32-/40-Bit) Two 16-Bit Multipliers (32-Bit Results) Load-Store Architecture With 32 32-Bit General-Purpose Registers Instruction Packing Reduces Code Size All Instructions Conditional Instruction Set Features Byte-Addressable (8-, 16-, 32-Bit Data) 8-Bit Overflow Protection Saturation Bit-Field Extract, Set, Clear Bit-Counting Normalization L1/L2 Memory Architecture 32K-Bit (4K-Byte) L1P Program Cache (Direct Mapped) 32K-Bit (4K-Byte) L1D Data Cache (2-Way Set-Associative) 512K-Bit (64K-Byte) L2 Unified Mapped RAM/Cache (Flexible Data/Program Allocation) D Device Configuration D D D D D D D D D D Boot Mode: HPI, 8-, 16-, and 32-Bit ROM Boot Endianness: Little Endian, Big Endian 32-Bit External Memory Interface (EMIF) Glueless Interface to Asynchronous Memories: SRAM and EPROM Glueless Interface to Synchronous Memories: SDRAM and SBSRAM 512M-Byte Total Addressable External Memory Space Enhanced Direct-Memo……
