器件名称:
SM320C80HFHM50
功能描述:
DIGITAL SIGNAL PROCESSOR
文件大小:
2876.89KB 共157页
简 介:
SMJ320C80 DIGITAL SIGNAL PROCESSOR SGUS025B – AUGUST 1998 – REVISED JUNE 2002 D Single-Chip Parallel Multiple D D Instruction/Multiple Data (MIMD) Digital Signal Processor (DSP) More Than Two Billion RISC-Equivalent Operations per Second Master Processor (MP) – 32-Bit Reduced Instruction Set Computing (RISC) Processor – IEEE-754 Floating-Point Capability – 4K-Byte Instruction Cache – 4K-Byte Data Cache Four Parallel Processors (PP) – 32-Bit Advanced DSPs – 64-Bit Opcode Provides Many Parallel Operations per Cycle – 2K-Byte Instruction Cache and 8K-Byte Data RAM per PP Transfer Controller (TC) – 64-Bit Data Transfers – Up to 400 Megabytes per Second (MBps) Transfer Rate – 32-Bit Addressing – Direct DRAM/VRAM Interface With Dynamic Bus Sizing – Intelligent Queuing and Cycle Prioritization Video Controller (VC) – Provides Video Timing and Video Random-Access Memory (VRAM) Control – Dual-Frame Timers for Two Simultaneous Image-Capture and/or Display Systems Big- or Little-Endian Operation 50K-Byte On-Chip RAM 4G-Byte Address Space 20-ns Cycle Time 3.3-V Operation IEEE Standard 1149.1 Test Access Port (JTAG) Operating Temperature Range –55°C to 125°C - M-Temperature –40°C to 85°C - A-Temperature GF PACKAGE (BOTTOM VIEW) 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 AP AM AK AH AF AD AB Y V T P M K H F D B AR AN AL AJ AG AE AC AA W U R N L J G E C A D D HFH PACKAGE (TOP VIEW) D 320 1 241 240 D D D D D D D 80 81 161 160 P……
