器件名称:
MC74HCT125ADR2G
功能描述:
Quad 3-State Noninverting Buffer with LSTTL Compatible Inputs
文件大小:
169.5KB 共8页
简 介:
MC74HCT125A Quad 3-State Noninverting Buffer with LSTTL Compatible Inputs HighPerformance SiliconGate CMOS The MC74HCT125A is identical in pinout to the LS125. The device inputs are compatible with standard CMOS and LSTTL outputs. The MC74HCT125A noninverting buffer is designed to be used with 3state memory address drivers, clock drivers, and other busoriented systems. The devices have four separate output enables that are activelow. Features 14 1 http://onsemi.com MARKING DIAGRAMS 14 PDIP14 MC74HCT125AN N SUFFIX AWLYYWWG CASE 646 1 Output Drive Capability: 15 LSTTL Loads Outputs Directly Interface to CMOS, NMOS, and TTL Operating Voltage Range: 2.0 to 6.0 V Low Input Current: 1.0 mA High Noise Immunity Characteristic of CMOS Devices In Compliance with the JEDEC Standard No. 7A Requirements Chip Complexity: 72 FETs or 18 Equivalent Gates These are PbFree Devices PIN ASSIGNMENT LOGIC DIAGRAM ActiveLow Output Enables A1 OE1 A2 OE2 A3 2 1 5 4 9 10 12 13 PIN 14 = VCC PIN 7 = GND 11 Y4 8 Y3 6 Y2 3 Y1 14 14 1 SOIC14 D SUFFIX CASE 751A 1 HCT125AG AWLYWW 14 14 1 TSSOP14 DT SUFFIX CASE 948G 1 HCT 125A ALYWG G OE1 A1 Y1 OE2 A2 Y2 GND 1 2 3 4 5 6 7 14 13 12 11 10 9 8 VCC OE4 A4 Y4 OE3 A3 Y3 14 SOEIAJ14 F SUFFIX CASE 965 1 A = Assembly Location L, WL = Wafer Lot Y, YY = Year W, WW = Work Week G = PbFree Package G = PbFree Package (Note: Microdot may be in either location) 74HCT125A ALYWG 14 1 FUNCTION TABLE HCT125A Inputs A H L X OE L L H Output Y H L Z OE3 A4 OE4 OR……
