器件名称:
UR6512
功能描述:
2A DDR BUS TERMINATION REGULATOR
文件大小:
228.83KB 共7页
简 介:
UNISONIC TECHNOLOGIES CO., LTD UR6512 2A DDR BUS TERMINATION REGULATOR DESCRIPTION LINEAR INTEGRATED CIRCUIT The UR6512 is a linear regulator providing up to 2A transient peak current and has sourcing and sinking capability for DDR SDRAM bus terminator applications while regulating an output voltage to within 20mV. It contains a high speed operational amplifier which provides fast load transient response and only requires 10uF of ceramic output capacitance. The UR6512 output termination voltage tracks the reference voltage applied at VREF pin. A resistor divider connected to VIN, GND and VREF pins is used to force the reference voltage to VREF pin. Additional features include current limiting protection and thermal shutdown protection. FEATURES * DDR1/ DDR2 Termination Voltage Applications * Low Output Voltage Offset within 20mV@±1.8A * Source and Sink 2A Peak Current * Adjustable Output Voltage by External Resistors * Integrated Power MOS Devices * Suspend to RAM(STR) Functionality * Current Limiting Protection * Thermal Shutdown Protection * Cost-Effective and Easy to Use ORDERING INFORMATION Ordering Number UR6512G-SH2-R Package HSOP-8 Packing Tape Reel www.unisonic.com.tw Copyright 2010 Unisonic Technologies Co., Ltd 1 of 7 QW-R101-030.A UR6512 PIN CONFIGURATIONS VIN GND VREF VOUT 1 2 GND 3 4 LINEAR INTEGRATED CIRCUIT 8 7 6 5 NC NC VCNTL NC PIN DESCRIPTION PIN NO 1 2 3 4 6 5,7,8 PIN NAME VIN GND VREF VOUT VCNTL NC PIN TYPE I O I O I -PIN DESCRIPTION ……
