器件名称:
ADC12J4000
功能描述:
ADC12J4000 12-Bit 4 GSPS ADC with Integrated DDC
文件大小:
294.18KB 共12页
简 介:
Product Folder Sample & Buy Technical Documents Tools & Software Support & Community ADC12J4000 SLAS989A – JANUARY 2014 – REVISED FEBRUARY 2014 ADC12J4000 12-Bit 4 GSPS ADC with Integrated DDC 1 Features 1 2 Applications Multi-Standard 3G and 4G Communication Receivers RF-Sampling Software Defined Radio Wideband Microwave Backhaul Military Communications SIGINT RADAR and LIDAR Wideband Communications Test and Measurement Excellent Noise and Linearity up to and beyond FIN = 2.7 GHz Configurable DDC Decimation Factors from 4 to 32 (Complex Baseband Out) Raw Output Bandwidth of 1000 MHz at 4x Decimation and 4000 MSPS Raw Output Bandwidth of 125 MHz at 32x Decimation and 4000 MSPS Bypass Mode for Full Bandwidth Data Low Pin-Count-Configurable JESD204B Output Interface Automatically Optimized Output Lane Count Embedded Low Latency Signal Range Indication Low Power Consumption Key Specifications – Max Sampling Rate: 4000 MSPS – Min Sampling Rate: 1000 MSPS – DDC Output Word Size: 15-Bit Complex (30 bits total) – Bypass Output Word Size: 12-Bit Offset Binary – Noise Floor: 149 dBFS/Hz or 150 dbm/Hz – IMD3: 64 dBc (FIN = 2670 MHz ± 2.5 MHz at 10 dBFS) – FPBW (-3 dB): 3.3 GHz – NPR: 48.5 dB – Supply Voltages: 1.9 and 1.2 V – Power Consumption – Bypass (4000 MSPS): 2.0 W – Decimate by 10 (4000 MSPS): 2 W – Power Down Mode: 10 mW 3 Description The ADC12J4000 device is a wideband sampling and digital tuning device. The core technology contained in the device……
