器件名称:
54AC11002
功能描述:
QUADRUPLE 2-INPUT POSITIVE-NOR GATES
文件大小:
67.52KB 共5页
简 介:
54AC11002, 74AC11002 QUADRUPLE 2-INPUT POSITIVE-NOR GATES SCAS024A – JUNE 1987 – REVISED APRIL 1993 Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configuration Minimizes High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-m Process 500-mA Typical Latch-Up Immunity at 125°C Package Options Include Plastic Small-Outline Packages, Ceramic Chip Carriers, and Standard Plastic and Ceramic 300-mil DIPs 54AC11002 . . . J PACKAGE 74AC11002 . . . D OR N PACKAGE (TOP VIEW) 1A 1Y 2Y GND GND 3Y 4Y 4B 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 1B 2A 2B VCC VCC 3A 3B 4A description These devices contain four independent 2-input NOR gates. They perform the Boolean functions Y = A S B or Y = A + B in positive logic. The 54AC11002 is characterized for operation over the full military temperature range of – 55°C to 125°C. The 74AC11002 is characterized for operation from – 40°C to 85°C. FUNCTION TABLE (each gate) INPUTS A H X L B X H L OUTPUT Y L L H 54AC11002 . . . FK PACKAGE (TOP VIEW) 2A 1B NC 1A 1Y 4 5 6 7 8 3 2 1 20 19 18 17 16 15 14 9 10 11 12 13 2B VCC NC VCC 3A 3B 4A NC 4B 4Y NC – No internal connection logic symbol 1A 1B 2A 2B 3A 3B 4A 4B 1 16 15 14 11 10 9 8 7 4Y 6 3Y 3 2Y ≥1 2 1Y logic diagram (positive logic) 1A 1B 2A 2B 3A 3B 4A 4B 1 16 15 14 11 10 9 8 2 1Y 2Y GND NC GND 3Y 3 2Y 6 3Y 7 4Y This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. Pin numbers shown are for the D, J, and N p……
