器件名称:
74HCT139PW
功能描述:
Dual 2-to-4 line decoder/demultiplexer
文件大小:
44.7KB 共7页
简 介:
INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications The IC06 74HC/HCT/HCU/HCMOS Logic Package Information The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines 74HC/HCT139 Dual 2-to-4 line decoder/demultiplexer Product specication File under Integrated Circuits, IC06 September 1993 Philips Semiconductors Product specication Dual 2-to-4 line decoder/demultiplexer FEATURES Demultiplexing capability Two independent 2-to-4 decoders Multifunction capability Active LOW mutually exclusive outputs Output capability: standard ICC category: MSI GENERAL DESCRIPTION 74HC/HCT139 The 74HC/HCT139 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard no. 7A. The 74HC/HCT139 are high-speed, dual 2-to-4 line decoder/multiplexers. This device has two independent decoders, each accepting two binary weighted inputs (nA0 and nA1) and providing four mutually exclusive active LOW outputs (nY0 to nY3). Each decoder has an active LOW enable input (nE). When nE is HIGH, every output is forced HIGH. The enable can be used as the data input for a 1-to-4 demultiplexer application. The “139” is identical to the HEF4556 of the HE4000B family. QUICK REFERENCE DATA GND = 0 V; Tamb = 25 °C; tr = tf = 6 ns TYPICAL SYMBOL tPHL/ tPLH PARAMETER propagation delay nAn to nYn nE3 to nYn CI CPD Notes 1. CPD is used to determine th……