器件名称:
74LVQ02M
功能描述:
QUAD 2-INPUT NOR GATE
文件大小:
56.53KB 共8页
简 介:
74LVQ02 QUAD 2-INPUT NOR GATE s s s s s s s s s s s HIGH SPEED: tPD = 5 ns (TYP.) at VCC = 3.3V COMPATIBLE WITH TTL OUTPUTS LOW POWER DISSIPATION: ICC = 2 A (MAX.) at TA = 25 oC LOW NOISE: VOLP = 0.3 V (TYP.) at VCC = 3.3V 75 TRANSMISSION LINE DRIVING CAPABILITY SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 12 mA (MIN) PCI BUS LEVELS GUARANTEED AT 24mA BALANCED PROPAGATION DELAYS: tPLH tPHL OPERATING VOLTAGE RANGE: VCC (OPR) = 2V to 3.6V (1.2V Data Retention) PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 02 IMPROVED LATCH-UP IMMUNITY M (Micro Package) T (TSSOP Package) ORDER CODES : 74LVQ02M 74LVQ02T technology. It is ideal for low power and low noise 3.3V applications. The internal circuit is composed of 3 stages including buffer output, which enables high noise immunity and stable output. It has better speed performance at 3.3V than 5V LS-TTL family combined with the true CMOS low power consumption. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage. DESCRIPTION The LVQ02 is a low voltage CMOS QUAD 2-INPUT NOR GATE fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS PIN CONNECTION AND IEC LOGIC SYMBOLS February 1999 1/8 74LVQ02 INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN DESCRIPTION PIN No 2, 5, 8, 11 3, 6, 9, 12 1, 4, 10, 13 7 14 SYMBOL 1A to 4A 1B to 4B 1Y to 4Y GND VCC NAME AND FUNCT ION Data Inputs Data Inputs Data Outputs Ground (0V) Positiv……
