器件名称:
74LVQ157TTR
功能描述:
LOW VOLTAGE QUAD 2 CHANNEL MULTIPLEXER
文件大小:
298.36KB 共12页
简 介:
74LVQ157 LOW VOLTAGE QUAD 2 CHANNEL MULTIPLEXER s s s s s s s s s s s HIGH SPEED: tPD = 7 ns (TYP.) at VCC = 3.3 V COMPATIBLE WITH TTL OUTPUTS LOW POWER DISSIPATION: ICC = 4 A (MAX.) at TA=25°C LOW NOISE: VOLP = 0.2V (TYP.) at VCC = 3.3V 75 TRANSMISSION LINE OUTPUT DRIVE CAPABILITY SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 12mA (MIN) at VCC = 3.0 V PCI BUS LEVELS GUARANTEED AT 24 mA BALANCED PROPAGATION DELAYS: tPLH tPHL OPERATING VOLTAGE RANGE: VCC(OPR) = 2V to 3.6V (1.2V Data Retention) PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 157 IMPROVED LATCH-UP IMMUNITY SOP TSSOP Table 1: Order Codes PACKAGE SOP TSSOP T&R 74LVQ157MTR 74LVQ157TTR DESCRIPTION The 74LVQ157 is a low voltage CMOS QUAD 2-CHANNEL MULTIPLEXER fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. It is ideal for low power and low noise 3.3V applications. It consists of four 2-input digital multiplexers with common select and strobe inputs. When STROBE input is held high selection of data is inhibit and all the outputs become low. The SELECT decoding determines whether the A or B inputs get routed to their corresponding Y outputs. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage. Figure 1: Pin Connection And IEC Logic Symbols July 2004 Rev. 5 1/12 74LVQ157 Figure 2: Input And Output Equivalent Circuit Table 2: Pin Description PIN N° 1 2, 5, 11, 14 3, 6, 10, 13 ……
