器件名称:
CD54AC2803A
功能描述:
2.4 GHZ WDECT/ISM SINGLE-CHIP TRANSCEIVER
文件大小:
9.77KB 共1页
简 介:
S E M I C O N D U C T O R CD54AC280/3A CD54ACT280/3A Functional Diagram I0 I1 I2 I3 I4 I5 I6 I7 I8 13 1 2 4 GND = 7 VCC = 14 NC = 3 8 9 10 5 11 12 6 June 1997 COMPLETE DATA SHEET COMING SOON! 9-Bit Odd/Even Parity Generator/Checker Description The CD54AC280/3A and CD54ACT280/3A are 9-bit odd/ even parity generator/checkers that utilize the Harris Advanced CMOS Logic technology. Both even and odd parity outputs are available for checking or generating parity words up to nine bits long. Even parity is indicated (∑E output is HIGH) when an even number of data inputs is HIGH. Odd parity is indicated (∑O output is HIGH) when an odd number of data inputs is HIGH. Parity checking for words larger than nine bits can be accomplished by tying the ∑E output to any output of an additional AC/ACT280 parity checker. The CD54AC280/3A and CD54ACT280/3A are supplied in 14 lead dual-in-line ceramic packages (F sufx). ACT INPUT LOAD TABLE INPUT All NOTE: 1. Unit load is ICC limit specied in DC Electrical Specications Table, e.g., 2.4mA Max at +25oC. UNIT LOAD (NOTE 1) 1.43 ∑ EVEN ∑ ODD Absolute Maximum Ratings DC Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to +6V DC Input Diode Current, IIK For VI < -0.5V or VI > VCC + 0.5V . . . . . . . . . . . . . . . . . . . . . .±20mA DC Output Diode Current, IOK For VO < -0.5V or VO > VCC + 0.5V . . . . . . . . . . . . . . . . . . . . .±50mA DC Output Source or Sink Current, Per Output Pin, IO For VO > -0.5V or VO < VCC……
