器件名称:
CD54HC00F3A
功能描述:
High Speed CMOS Logic Quad 2-Input NAND Gate
文件大小:
33.64KB 共10页
简 介:
CD54HC00, CD74HC00, CD54HCT00, CD74HCT00 Data sheet acquired from Harris Semiconductor SCHS116C January 1998 - Revised September 2003 High-Speed CMOS Logic Quad 2-Input NAND Gate Description The CD54HC00, CD74HC00, CD54HCT00, and CD74HCT00 logic gates utilize silicon gate CMOS technology to achieve operating speeds similar to LSTTL gates with the low power consumption of standard CMOS integrated circuits. All devices have the ability to drive 10 LSTTL loads. The 74HCT logic family is functionally pin compatible with the standard 74LS logic family. Features Buffered Inputs [ /Title (CD54 HC00, CD54 HCT00 , CD74 HC00, CD74 HCT00 ) /Sub- Typical Propagation Delay: 7ns at VCC = 5V, CL = 15pF, TA = 25oC Fanout (Over Temperature Range) - Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads - Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads Wide Operating Temperature Range . . . -55oC to 125oC Balanced Propagation Delay and Transition Times Signicant Power Reduction Compared to LSTTL Logic ICs Alternate Source is Philips/Signetics HC Types - 2V to 6V Operation - High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V HCT Types - 4.5V to 5.5V Operation - Direct LSTTL Input Logic Compatibility, VIL= 0.8V (Max), VIH = 2V (Min) - CMOS Input Compatibility, Il ≤ 1A at VOL, VOH Ordering Information PART NUMBER CD54HC00F3A CD54HCT00F3A CD74HC00E CD74HC00M CD74HC00MT CD74HC00M96 CD74HCT00E CD74HCT00M CD74HCT00MT CD74HCT00M96 TEMP. RANGE (oC) -55 to 125……
