器件名称:
74AC11651
功能描述:
OCTAL BUS TRANSCEIVER AND REGISTER WITH 3-STATE OUTPUTS
文件大小:
142.45KB 共9页
简 介:
74AC11651 OCTAL BUS TRANSCEIVER AND REGISTER WITH 3-STATE OUTPUTS SCAS135 – MARCH 1990 – REVISED APRIL 1993 Independent Registers and Enables for A and B Buses Multiplexed Real-Time and Stored Data Inverting Data Paths Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-m Process 500-mA Typical Latch-Up Immunity at 125°C Package Options Include Plastic Small-Outline Packages and Standard Plastic 300-mil DIPs DW OR NT PACKAGE (TOP VIEW) OEAB A1 A2 A3 A4 GND GND GND GND A5 A6 A7 A8 OEBA 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 CLKAB SAB B1 B2 B3 B4 VCC VCC B5 B6 B7 B8 CLKBA SBA description These devices consist of bus transceiver circuits, D-type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the data bus or from the internal storage registers. Output-enable (OEAB and OEBA) inputs are provided to control the transceiver functions. The select-control (SAB and SBA) inputs are provided to select whether real-time or stored data is transferred. A low input level selects real-time data, and a high input level selects stored data. Figure 1 illustrates the four fundamental bus-management functions that can be performed with the 74AC11651. Data on the A or B bus, or both, can be stored in the internal D flip-flops by low-to-high transitions at the appropriate clock (CLKAB or CL……
