器件名称:
74HC238D
功能描述:
3-to-8 line decoder/demultiplexer
文件大小:
49.61KB 共7页
简 介:
INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications The IC06 74HC/HCT/HCU/HCMOS Logic Package Information The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines 74HC/HCT238 3-to-8 line decoder/demultiplexer Product specication File under Integrated Circuits, IC06 December 1990 Philips Semiconductors Product specication 3-to-8 line decoder/demultiplexer FEATURES Demultiplexing capability Multiple input enable for easy expansion Ideal for memory chip select decoding Active HIGH mutually exclusive outputs Output capability: standard ICC category: MSI GENERAL DESCRIPTION The 74HC/HCT238 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT238 decoders accept three binary weighted address inputs (A0, A1, A2) and when enabled, QUICK REFERENCE DATA GND = 0 V; Tamb = 25 °C; tr = tf = 6 ns 74HC/HCT238 provide 8 mutually exclusive active HIGH outputs (Y0 to Y7). The “238” features three enable inputs: two active LOW (E1 and E2) and one active HIGH (E3). Every output will be LOW unless E1 and E2 are LOW and E3 is HIGH. This multiple enable function allows easy parallel expansion of the “238” to a 1-of-32 (5 lines to 32 lines) decoder with just four “238” ICs and one inverter. The “238” can be used as an eight output demultiplexer by using one of the active LOW enable inputs as t……