器件名称:
74HC243
功能描述:
Quad bus transceiver; 3-state
文件大小:
49.52KB 共8页
简 介:
INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications The IC06 74HC/HCT/HCU/HCMOS Logic Package Information The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines 74HC/HCT243 Quad bus transceiver; 3-state Product specication File under Integrated Circuits, IC06 December 1990 Philips Semiconductors Product specication Quad bus transceiver; 3-state FEATURES Non-inverting 3-state outputs 2-way asynchronous data bus communication Output capability: bus driver ICC category: MSI GENERAL DESCRIPTION The 74HC/HCT243 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. 74HC/HCT243 The 74HC/HCT243 are quad bus transceivers featuring non-inverting 3-state bus compatible outputs in both send and receive directions. They are designed for 4-line asynchronous 2-way data communications between data buses. The output enable inputs (OEA and OEB) can be used to isolate the buses. The “243” is similar to the “242” but has non-inverting (true) outputs. QUICK REFERENCE DATA GND = 0 V; Tamb = 25 °C; tr = tf = 6 ns TYPICAL SYMBOL tPHL/ tPLH PARAMETER propagation delay An to Bn; Bn to An input capacitance input/output capacitance power dissipation capacitance per transceiver notes 1 and 2 CONDITIONS HC CL = 15 pF; VCC = 5 V 6 HCT 11 ns UNIT CI CI/O CPD Notes 3.5 10 26 3.5 10 34 pF pF pF 1. CPD is used ……
