器件名称:
74LV373N
功能描述:
Octal D-type transparent latch 3-State
文件大小:
123.2KB 共12页
简 介:
INTEGRATED CIRCUITS 74LV373 Octal D-type transparent latch (3-State) Product specification Supersedes data of 1997 March 04 IC24 Data Handbook 1998 Jun 10 Philips Semiconductors Philips Semiconductors Product specification Octal D-type transparent latch (3-State) 74LV373 FEATURES Wide operating voltage: 1.0 to 5.5V Optimized for Low Voltage applications: 1.0V to 3.6V Accepts TTL input levels between VCC = 2.7V and VCC = 3.6V Typical VOLP (output ground bounce) < 0.8V at VCC = 3.3V, Typical VOHV (output VOH undershoot) > 2V at VCC = 3.3V, Common 3-State output enable input Output capability: bus driver ICC category: MSI Tamb = 25°C Tamb = 25°C DESCRIPTION The 74LV373 is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC/HCT373. The 74LV373 is an octal D-type transparent latch featuring separate D-type inputs for each latch and 3-State outputs for bus oriented applications. A latch enable (LE) input and an output enable (OE) input are common to all internal latches. The ‘373’ consists of eight D-type transparent latches with 3-State true outputs. When LE is HIGH, data at the Dn inputs enters the latches. In this condition the latches are transparent, i.e., a latch output will change each time its corresponding D-input changes. When LE is LOW the latches store the information that was present at the D-inputs a set-up time preceding the HIGH-to-LOW transition of LE. When OE is LOW, the contents of the eight latches are available at t……
