器件名称:
CD54HCT573F3A
功能描述:
OCTAL TRANSPARENT D-TYPE LATCHES WITH 3 STATE OUTPUTS
文件大小:
333.58KB 共10页
简 介:
CD54HCT573, CD74HCT573 OCTAL TRANSPARENT DTYPE LATCHES WITH 3STATE OUTPUTS SCLS455C FEBRUARY 2001 REVISED MAY 2004 D 4.5-V to 5.5-V VCC Operation D Wide Operating Temperature Range of D D D D 55°C to 125°C Balanced Propagation Delays and Transition Times Standard Outputs Drive Up To 10 LS-TTL Loads Significant Power Reduction Compared to LS-TTL Logic ICs Inputs Are TTL-Voltage Compatible CD54HCT573 . . . F PACKAGE CD74HCT573 . . . DB, E, OR M PACKAGE (TOP VIEW) description/ordering information The ’HCT573 devices are octal transparent D-type latches. When the latch-enable (LE) input is high, the Q outputs follow the data (D) inputs. When LE is low, the Q outputs are latched at the logic levels of the D inputs. OE 1D 2D 3D 4D 5D 6D 7D 8D GND 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 VCC 1Q 2Q 3Q 4Q 5Q 6Q 7Q 8Q LE A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high or low) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without interface or pullup components. OE does not affect the internal operations of the latches. Old data can be retained or new data can be entered while the outputs are in the high-impedance state. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the min……
